ADV7162KS140 Analog Devices Inc, ADV7162KS140 Datasheet - Page 31

• Manufacturer Part Number: ADV7162KS140
• Description: IC DAC VIDEO COLOR 96BIT 160MQFP
• Manufacturer: Analog Devices Inc
• Type: Video DACr

Specifications of ADV7162KS140

• Rohs Status: RoHS non-compliant
• Applications: HDTV
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP

REV. 0
PLL V Register
(Address Reg (A10–A0) = 00FH)
This register is a read only 10-bit register. However V9–V8 are
reserved bits, containing zeros. Bit V7 is a read only bit. This
bit should be masked in software on readback as its value may
be indeterminate. Therefore, the PLL V Register may be treated
as a 7-bit wide register. This register, together with the VSEL
Bit in the PLL Control Register, controls the feedback divider
of the on-board PLL.
64
The ADV7160/ADV7162 has a 64 64 cursor generator on
board. Several of the control registers control the cursor.
These will be described in detail. The Cursor-X and Cursor-Y
registers specify the position the cursor is to be placed on the
screen. The origin (0, 0) of the cursor is top left. The position
of the cursor is taken relative to this point, allowing the Cursor-
X and Cursor-Y registers to be programmed with negative num-
bers and thus allow the cursor to be partially or completely off
the screen. The cursor can work as an X-11 or XGA cursor,
controlled by Bits CCR0 and CCR1 of the Cursor Control
Register.
The screen X and Y coordinates are measured from the rising
edge of BLANK. The first pixel after the rising edge of BLANK
corresponds to the origin (0, 0). The Vertical retrace time is ex-
tracted from the composite SYNC and BLANK inputs. The
start of Vertical Retrace is recognized by counting a second ris-
ing edge on SYNC while BLANK remains low. The next rising
edge on BLANK is the start of line 0.
Cursor X-Lo and Cursor X-Hi Register
(Address Reg (A10–A0) = 200H and 201H)
These 8-bit registers together form a 16-bit 2s complement rep-
resentation of the cursor x-coordinate on the screen. The valid
range for the cursor x-coordinate is FFFH. The negative
number representation allows for part or all of the cursor to be
displayed off the left-hand edge of the screen
Cursor Y-Lo and Cursor Y-Hi Register
(Address Reg (A10–A0) = 202H and 203H)
These 8-bit registers together form a 16-bit 2s complement rep-
resentation of the cursor x-coordinate on the screen. The valid
range for the cursor x-coordinate is FFFH. The negative
number representation allows for part or all of the cursor to be
displayed off the top/left of the screen.
When accessing the cursor X and Y registers, the Address Regis-
ter auto-increments after each access. There are no restrictions
on updating the cursor coordinate registers other than they must
all be written in the order X-Low, X-Hi, Y-Low, Y-Hi to update
the coordinates. Only one cursor is displayed per frame, at the
last X and Y coordinates written. Access to these registers is
independent of the databus being configured for 8- or 10-bit
operation.
Cursor Color 1 and Cursor Color 2 Register
(Address Reg (A10–A0) = 304H and 303H)
Each of these color registers are 30 bits wide, made up of 10 bits
for Red, 10 bits for Green and 10 bits for Blue. Access to these
registers behaves in the same way as access to the Color Palette
with respect to the different combinations of 10/8-bit databus
and 10/8-bit DAC resolution.
Cursor Image
(Address Reg (A10–A0) = 400H–7FFH)
This region contains the 64 64
64 Cursor
2-bit Cursor Image. Eight
–31–
bits are stored at each address. With two bits per cursor pixel,
four horizontally adjacent pixels are stored at each address. As
each address location in the Cursor Image is filled, the progres-
sion is from left to right until a line is filled and top to bottom
until all the lines are filled. The cursor can be displayed on both
an interlaced and noninterlaced system, as controlled by CCR3
of the Cursor Control Register. On an interlaced system, only
one cursor can be displayed per field. The ODD/EVEN input
indicates which field of the frame is being displayed.
Cursor Y Coordinate Even
The Even field starts with line 0 of the cursor image on line Y of
the frame. Subsequent even lines of the cursor image are dis-
played on subsequent lines of the Even field. On the Even field,
the frame line counter starts at 0 and increments by 2 at the end
of every Even field line. The Odd field starts with line 1 of the
cursor image on line Y + 1 of the frame. Subsequent odd lines
of the cursor image are displayed on subsequent lines of the
Odd field. On the Odd field, the frame line counter starts at 1
and increments by 2 at the end of every Odd field line.
Cursor Y Coordinate Odd
The Even field starts with line 1 of the cursor image on line
Y + 1 of the frame. Subsequent even lines of the cursor image
are displayed on subsequent lines of the Even field. On the
Even field, the frame line counter starts at 1 and increments by
2 at the end of every Even field line. The Odd field starts with
line 0 of the cursor image on line Y of the frame. Subsequent
odd lines of the cursor image are displayed on subsequent lines
of the Odd field. On the Odd field, the frame line counter starts
at 0 and increments by 2 at the end of every Odd field line.
Cursor Control Register
(Address Reg (A10–A0) = 204H)
This register contains a number of control bits. CCR is a 10-bit
wide register. However for programming purposes, it may be
considered as an 8-bit wide register (CCR8 and CCR9 are both
reserved). In write mode zero should be written to CCR4 to
CCR7. In read mode, CCR8 and CCR9 are all returned as
zeros.
Figure 45 shows the various operations under the control of
CCR.
CURSOR CONTROL REGISTER BIT DESCRIPTION
CURSOR MODE CONTROL (CCR1–CCR0)
These bits specify which type of cursor is being used. Each cur-
sor pixel value controls the color differently in each mode.
Bit 1
0
0
1
1
Cursor Enable Control (CCR2)
This bit turns the cursor on and off.
Interlace Control (CCR3)
This bit determines whether the cursor is being used in inter-
laced or noninterlaced mode.
Bit 0
0
1
0
1
X-11 Cursor
Transparent
Transparent
Color 1
Color 2
Table II.
ADV7160/ADV7162
XGA Cursor
Color 1
Color 2
Transparent
Bit-Wise Complement