AD8326ARE Analog Devices Inc, AD8326ARE Datasheet - Page 11

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AD8326ARE

Manufacturer Part Number
AD8326ARE
Description
IC LINE DVR CATV PROG 28-TSSOP
Manufacturer
Analog Devices Inc
Type
Line Driver, Transmitterr
Datasheet

Specifications of AD8326ARE

Rohs Status
RoHS non-compliant
Applications
CATV
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
For Use With
AD8326ARE-EVAL - BOARD EVAL FOR AD8326 TSSOP

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Input Bias, Impedance, and Termination
The V
mately 1.47 V below V
be ac-coupled using 0.1 F capacitors as seen in the typical
application circuit (see Figure 5).
The differential input impedance of the AD8326 is approxi-
mately 1600 , while the single-ended input is 800 .
Single-Ended Inverting Input
When operating the AD8326 in a single-ended input mode V
and V
AD8326 evaluation boards, this termination method requires the
removal of R12, R13, R14, R16, R17, and R18. Install a 0
jumper at R15, an 82.5
39.2
evaluation board (Figure 11). Other input impedance configura-
tions may be calculated using the equations in Figure 6.
The inverting and noninverting inputs of the AD8326 must be
balanced for all input configurations.
Differential Input from Single-Ended Source
The default configuration of the evaluation board implements a
differential signal drive from a single-ended signal source. A
IN
IN
resistor at R11 to balance the inputs of the AD8326
– should be terminated as illustrated in Figure 6. On the
+ and V
V
V
EE
CC
V
DATEN
SDATA
SLEEP
IN
IN
TXEN
CLK
– inputs have a dc bias level of approxi-
CC
R10
resistor at R10 for a 75
/2, therefore the input signal should
10 F
10 F
R11
Z
R11 = Z
IN
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
= R10||800
IN
||R10
+
AD8326
system, and a
10
11
12
13
14
1
2
3
4
5
6
7
8
9
DATEN
SDATA
CLK
GND1
V
TXEN
SLEEP
GND
V
V
V
GND
V
V
CC
CC
CC
EE
EE
OUT–
AD8326
IN
+
TOKO 617DB-A0070
V
GND
GND
OUT+
V
BYP
V
V
V
V
V
V
V
V
V
TO DIPLEXER
Z
IN–
IN+
CC
EE
CC
CC
CC
EE
EE
EE
IN
Toko 1:1 transformer is included on the board for this purpose
(T3). Enabling the evaluation board for single to differential
input conversion requires R15–R17 to be removed, and 0
jumpers must be installed on the placeholders for R13, R14, and
R18. For a 75
to Figure 11 for evaluation board schematic. In this configuration,
the input signal must be applied to V
ances may be calculated using the equation in Figure 7.
Differential Signal Source
The AD8326 evaluation board is also capable of accepting a
differential input signal. This requires the installation of a 165
resistor in R12, the removal of R13–R14, R17–R18, and the
installation of 0
results in a differential input impedance of 150 . Other differ-
ential input impedance configurations may be calculated with
the equation in Figure 8.
= 75
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
V
IN
IN
IN
+
input impedance, R12 should be 78.7 . Refer
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
jumpers for R15–R16. This configuration
DESIRED IMPEDANCE = R12||1600
DESIRED IMPEDANCE = R12||1600
0.1 F
0.1 F
R12
165
R12
IN
–. Other input imped-
Z
IN
AD8326
AD8326
V
V
= 150
IN–
IN+
AD8326

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