DS8024 Maxim, DS8024 Datasheet - Page 9

• Manufacturer Part Number: DS8024
• Description: The DS8024 smart card interface IC is a low-cost, analog front-end for a smart card reader, designed for all ISO 7816, EMV®, and GSM11-11 applications
• Manufacturer: Maxim

When a card is inserted into the reader (if PRES is
active), the host microcontroller can begin an activation
sequence (start a card session) by pulling CMDVCC
low. The following events form an activation sequence
(Figure 3):
Figure 3. Activation Sequence Using RSTIN and CMDVCC
1) Host: CMDVCC is pulled low.
2) DS8024: The internal oscillator changes to high
3) DS8024: The voltage generator is started
4) DS8024: V
5) DS8024: I/O, AUX1, and AUX2 are enabled (t
6) DS8024: The CLK signal is applied to the C3 con-
7) DS8024: RST is enabled (t
frequency (t
(between t
trolled slope (t
internal oscillator period (approximately 25µs).
t
tact (t
1
+ 4T).
CMDVCC
RSTIN
4
I/OIN
CLK
).
V
RST
I/O
CC
0
CC
0
and t
).
_______________________________________________________________________________________
rises from 0 to 5V or 3V with a con-
2
= t
1
).
1
+ 1.5 × T). T is 64 times the
t
0
t
5
1
= t
1
t
+ 7T).
2
t
3
3
t
4
=
t
5
An alternate sequence allows the application to control
when the clock is applied to the card.
If the applied clock is not needed, set CMDVCC low
with RSTIN low. In this case, CLK starts at t
200ns after the transition on I/O, see Figure 4); after t
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform acti-
vation with RSTIN held permanently high.
When the activation sequence is completed, the
DS8024 card interface is in active mode. The host
microcontroller and the smart card exchange data on
the I/O lines.
= t
ACT
1) Host: Set RSTIN high.
2) Host: Set CMDVCC low.
3) Host: Set RSTIN low between t
4) DS8024: RST stays low until t
5) DS8024: RSTIN has no further effect on CLK after t
Smart Card Interface
start.
the copy of RSTIN.
5
3
Active Mode
, then RST becomes
ATR
and t
5
; CLK will now
3
(minimum
5
5
9
.
,