MAXQ1850 Maxim, MAXQ1850 Datasheet

MAXQ1850

Manufacturer Part Number

MAXQ1850

Description

The MAXQ1850 is a low-power, 32-bit RISC device designed for electronic commerce, banking, and data security systems

Manufacturer

Maxim

Datasheet

1.MAXQ1850.pdf (2 pages)

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Download datasheet (55Kb)

The MAXQ1850 is a low-power, 32-bit RISC device

designed for electronic commerce, banking, and data

security systems. It combines high-performance, single-

cycle processing, sophisticated tamper-detection technol-

ogy, and advanced cryptographic hardware to provide

industry-leading data security and secret key protection.

Physical security mechanisms include environmental

sensors that detect out of range voltage or temperature

conditions, responding with rapid zeroization of critical

data. Four self-destruct inputs are provided for addition-

al tamper response. An internal shield over the silicon

provides protection from microprobe attacks. A high-

speed internal ring oscillator is provided to thwart

attacks that rely on controlling the clock rate of the chip.

To protect data, the MAXQ1850 integrates several high-

speed, analysis-resistant encryption engines. Algorithms

supported in hardware include AES (128-, 192-, and

256-bit), DES, triple DES (2-key and 3-key), ECDSA

(160-, 192-, and 256-bit keys), DSA, RSA (up to 2048

bits), SHA-1, SHA-224, and SHA-256. The advanced

security features of the MAXQ1850 are designed to

meet the stringent requirements of regulations such as

ITSEC E3 High, FIPS 140-2 Level 3, and the Common

Criteria certifications.

The MAXQ1850 includes 256KB of flash memory and

8KB of secure, battery-backed data SRAM. Several

communication protocols are supported with hardware

engines, including ISO 7816 for smart card applications,

USB (slave interface with four end-point buffers), an RS-

232 universal synchronous/asynchronous receiver-

transmitter (USART), an SPI™ interface (master or slave

mode support), and up to 16 general-purpose I/O pins.

Other peripherals supported on the MAXQ1850 include

a true hardware random-number generator (RNG), a

real-time clock (RTC), a programmable watchdog timer,

and flexible 16-bit timers that support capture, compare,

and pulse-width modulation (PWM) operations.

19-5265; Rev 3; 9/11

EMV is a registered trademark of EMVCo LLC.

SPI is a trademark of Motorola, Inc.

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be

simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Electronic Commerce

EMV

Secure Access Control

Secure Data Storage

Banking

________________________________________________________________ Maxim Integrated Products

General Description

ABRIDGED DATA SHEET

Pay-per-Play

Certificate Authentication

Electronic Signature

Generation

with Rapid Zeroization Technology

Applications

Secure Cryptographic Controller

♦ High-Performance, Low-Power, 32-Bit MAXQ30

♦ Single 3.3V Supply Enables Low Power/Flexible

♦ DC to 16MHz Code Execution Across Entire

♦ 65MHz Cryptography Engine Execution to Reduce

♦ On-Chip 2x/4x Clock Multiplier

♦ 33 Instructions

♦ 16-Bit Instruction Word, 32-Bit Internal Data Bus

♦ 16 x 32-Bit Accumulators

♦ Up to 16 General-Purpose I/O Pins

♦ 5V Tolerant I/O

♦ Virtually Unlimited Software Stack

♦ Optimized for C-Compiler (High-Speed/Density Code)

♦ Memory Features

♦ Security Features

♦ Additional Peripherals

♦ Low-Power Consumption

See the Detailed Features section for complete list of features.

+ Denotes a lead(Pb)-free/RoHS-compliant package.

* EP = Exposed pad.

Selector Guide appears at end of data sheet.

MAXQ1850-BNS+

MAXQ1850-LNS+

MAXQ1850-DNS+

RISC Core

Interfacing

Operating Range

Processing Time

PART

-40°C to +85°C

Ordering Information

TEMP RANGE

PIN-PACKAGE

40 TQFN-EP*

49 CSBGA

Bare die

Features

Related parts for MAXQ1850

MAXQ1850 Summary of contents

Page 1

... ABRIDGED DATA SHEET 19-5265; Rev 3; 9/11 with Rapid Zeroization Technology General Description The MAXQ1850 is a low-power, 32-bit RISC device designed for electronic commerce, banking, and data security systems. It combines high-performance, single- cycle processing, sophisticated tamper-detection technol- ogy, and advanced cryptographic hardware to provide industry-leading data security and secret key protection ...

Page 2

... CORE OSC OSC 8KB NV SRAM RTC 32kHz 12MHz MAXQ1850 ♦ Security Features Unique ID Tamper Detection with Rapid Key/Data Destruction Four Self-Destruct Inputs Hardware AES and DES Engines Public Key Cryptographic Accelerator for DSA, ECDSA, and RSA Supports SHA-1, SHA-224, and SHA-256 ...

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