DS89C430 Maxim, DS89C430 Datasheet - Page 16

• Manufacturer Part Number: DS89C430
• Description: The DS89C430 and DS89C450 offer the highest performance available in 8051-compatible microcontrollers
• Manufacturer: Maxim

REGISTER
All standard SFR locations from the 8051 are duplicated in the DS89C430, and several SFRs have been added for
the unique features of the DS89C430. Most of these features are controlled by bits in SFRs located in unused
locations in the 8051 SFR map, allowing for increased functionality while maintaining complete instruction set
compatibility.
bits.
Data Pointers
The data pointers (DPTR and DPTR1) are used to assign a memory address for the MOVX instructions. This
address can point to a MOVX RAM location (on-chip or off-chip) or a memory-mapped peripheral. Two pointers are
useful when moving data from one memory area to another, or when using a memory-mapped peripheral for both
source and destination addresses. The user can select the active pointer through a dedicated SFR bit (SEL =
DPS.0), or can activate an automatic toggling feature for altering the pointer selection (TSL = DPS.5). An additional
feature, if selected, provides automatic incrementing or decrementing of the current DPTR.
Stack Pointer
The stack pointer denotes the register location at the top of the stack, which is the last used value. The user can
place the stack anywhere in the scratchpad RAM by setting the stack pointer to the desired location, although the
lower bytes are normally used for working registers.
I/O Ports
The DS89C430 offers four 8-bit I/O ports. Each I/O port is represented by an SFR location and can be written or
read. The I/O port has a latch that contains the value written by software.
Counter/Timers
Three 16-bit timer/counters are available in the DS89C430. Each timer is contained in two SFR locations that can
be read or written by software. The timers are controlled by other SFRs, described in the SFR Bit Description
section of the Ultra-High-Speed Flash Microcontroller User’s Guide.
Serial Ports
The DS89C430 provides two UARTs that are controlled and accessed by SFRs. Each UART has an address that
is used to read and write the value contained in the UART. The same address is used for both read and write
operations, and the read and write operations are distinguished by the instruction. Its own SFR control register
controls each UART.
Table 1. SFR Register Map
PCON
TMOD
TCON
DPH1
DPL1
DPH
DPS
DPL
TH0
TL0
TL1
SP
P0
ADDRESS
Table 1
8Ah
8Bh
8Ch
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
shows the SFRs and their locations.
SMOD_0
GATE
BIT 7
P0.7
TF1
ID1
SMOD0
BIT 6
P0.6
TR1
ID0
C/T
BIT 5
OFDF
P0.5
TSL
TF0
M1
DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers
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Table 2
OFDE
BIT 4
P0.4
TR0
AID
M0
specifies the default reset condition for all SFR
BIT 3
GATE
P0.3
GF1
IE1
—
BIT 2
P0.2
GF0
IT1
C/T
—
BIT 1
STOP
P0.1
IE0
M1
—
BIT 0
IDLE
P0.0
SEL
IT0
M0