DS1993 Maxim, DS1993 Datasheet
DS1993
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DS1993 Summary of contents
Page 1
... SPECIAL FEATURES 4096 bits of Read/Write Nonvolatile Memory (DS1993) 1024 bits of Read/Write Nonvolatile Memory (DS1992) 256-bit Scratchpad Ensures Integrity of Data Transfer Memory Partitioned into 256-bit Pages for Packetizing Data Data Integrity Assured with Strict Read/Write Protocols Operating Temperature Range from -40°C to +70° ...
Page 2
... The advantages of parasite power are two-fold parasiting off this input, battery power is not consumed for 1-Wire ROM function commands, and 2) if the battery is exhausted for any reason, the ROM may still be read normally. The remaining circuitry of the DS1992 and DS1993 is solely operated by battery energy. ...
Page 3
... Figure 1. DS1992/DS1993 BLOCK DIAGRAM 1-WIRE FUNCTION 1-W PORT CONTROL MEMORY FUNCTION CONTROL 3V LITHIUM Figure 2. 64-BIT LASERED ROM MSB 8-Bit CRC Code MSB LSB Figure 3. 1-Wire CRC CODE STAGE STAGE STAGE STAGE ROM 64-BIT LASERED ROM ...
Page 4
... Figure 4a. DS1993 MEMORY MAP SCRATCHPAD PAGE PAGE 0 PAGE 1 PAGE 2 PAGE 3 PAGE 4 PAGE 5 PAGE 6 PAGE 7 PAGE 8 MEMORY PAGE 9 PAGE 10 PAGE 11 PAGE 12 PAGE 13 PAGE 14 PAGE 15 Figure 4b. DS1992 MEMORY MAP SCRATCHPAD PAGE PAGE 0 PAGE 1 MEMORY PAGE 2 PAGE 3 NOTE: Each page is 32 bytes (256 bits). The hex values represent the starting address for each page or register ...
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... MEMORY The memory map in Figure 4 shows a 32-Byte page called the scratchpad, and additional 32-Byte pages called memory. The DS1992 contains pages 0 though 3 that make up the 1024-bit SRAM. The DS1993 contain pages 0 through 15 that make up the 4096-bit SRAM. The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to the scratchpad where it can be read back ...
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... CRC with each page of data to ensure rapid, error-free data transfers that eliminate having to read a page multiple times to determine if the received data is correct or not. (See Application Note 114 for the recommended file structure to be used with the 1-Wire environment DS1992/DS1993 ...
Page 7
... DS199x Increments Scratchpad Offset Y Partial Byte Written DS1992/DS1993 AAH To Figure 6 Read Scratchpad Second Part ? Y Bus Master RX TA1 (T7:T0) Bus Master RX TA2 (T15:T8) Master RX Ending Offset with Data Status (E/S) DS199x Sets Scratchpad Offset=(T4:T0) Master RX Data Byte From ...
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... Bus Master TX Reset ? Y To Figure 6 First Part N N DS199x Increments Address Counter N Bus Master TX Reset ? DS1992/DS1993 F0H Y Read Memory ? N Bus Master TX TA1 (T7:T0) Bus Master TX TA2 (T15:T8) DS199x sets Memory Address = (T15:T0) Master RX Data Byte From Memory Address Y Bus Master ...
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... <128 Bytes (DS1992)> RX <512 Bytes (DS1993)> COMMENTS Reset Reset pulse (480µs to 960µs) Presence Presence pulse CCh Issue skip ROM command 0Fh Issue write scratchpad command 26h TA1, beginning offset = 6 00h TA2, address = 0026h < ...
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... All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the V PUP R PU DATA 5 µA Typ RECEIVE TX = TRANSMIT DS1992/DS1993 DS199x 1-Wire PORT RX TX 100 Ω MOSFET ...
Page 11
... The 1-Wire bus is pulled to a high state through the pullup resistor. After detecting the rising edge on the data line, the DS199x waits (t to 60µs) and then transmits the presence pulse (t , minimum 480µs). The bus RSTL , 60µs to 240µs). PDL DS1992/DS1993 , 15µs PDH ...
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... DS199x TX Bit 0 DS199x TX Bit 0 Master TX Bit Bit 0 Bit 0 Match ? Y DS199x TX Bit 1 DS199x TX Bit 1 Master TX Bit Bit 1 Bit 1 Match ? Y DS199x TX Bit 63 DS199x TX Bit 63 Master TX Bit Bit 63 Match ? Y Master TX Memory Function Command CCH N Skip ROM Command ? DS1992/DS1993 N ...
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... SLOT 1 µs ≤ t < 15 µs LOW1 ∞ 1 µs ≤ t < REC RSTH t PDL * In order not to mask interrup signaling by other devices on the 10Wire bus t RSTL + t should always be less than 960 Includes recovery time t REC DS1992/DS1993 ...
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... REC t SLOT Master Sampling Window LOWR t RDV 60 µs ≤ t < 120 µs SLOT 1 µs ≤ t < 15 µs LOWR 0 ≤ t < 45 µs RELEASE DS1992/DS1993 t REC t REC t RELEASE ∞ 1 µs ≤ t < REC µs RDV t < 1 µs SU ...
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... SLOT t 1 LOW1 t 60 LOW0 t exactly 15 RDV t 0 RELEASE REC t 480 RSTH t 480 RSTL t 15 PDH t 60 PDL DS1992/DS1993 TYP MAX UNITS 6.0 +0.3 0.4 5 TYP MAX UNITS 100 800 TYP MAX UNITS 120 15 120 960 60 240 µA pF µ ...
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... RoHS status. PACKAGE TYPE PACKAGE CODE F5 iButton , 5µs after power has been applied, the parasite capacitance does not affect ) should be restricted to a maximum of 960µs, to allow interrupt OUTLINE NO. IB+5BW DS1992/DS1993 power supply. CC LAND PATTERN NO. 21-0266 — ...
Page 17
... ROM function commands, and 2) if the battery is exhausted for any reason, the ROM 10/08 may still be read normally. The remaining circuitry of the DS1992 and DS1993 is solely operated by battery energy.” In the DC Electrical Characteristics section, relocated V header to the EC table, changed V removed the V ...