DS2417 Maxim, DS2417 Datasheet
DS2417
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DS2417 Summary of contents
Page 1
... Only one pin is required for communication with the device. Utilizing a backup energy source, the data is nonvolatile and allows for stand-alone operation. The DS2417 features can be used to add functions such as calendar, time and date stamp, and logbook to any type of electronic device or embedded application that uses a microcontroller. ...
Page 2
... OVERVIEW The DS2417 has two main data components: 1) 64-bit lasered ROM, and 2) real-time clock counter (Figure 1). The real-time clock utilizes an on-chip oscillator that is connected to an external 32.768kHz crystal. The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM ...
Page 3
... LASERED ROM Each DS2417 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure 3.) The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4 ...
Page 4
... DEVICE CONTROL BYTE The DS2417 can generate interrupt pulses to trigger activities that have to occur at regular intervals. The selection of this interval and the on/off control of the 32.768kHz crystal oscillator are done through the device control byte. This byte can be read and written through the Clock Function commands. ...
Page 5
... The “Clock Function Flow Chart” (Figure 5) describes the protocols necessary for accessing the real-time clock. With only four bytes of real-time clock and one control byte the DS2417 does not provide random access. Reading and writing always starts with the device control byte followed by the least significant byte of the time data ...
Page 6
... Y 99H N Write Clock ? Y Bus Master TX Device Control Byte Bus Master TX LS Byte (7:0) Bus Master TX next Byte (15:8) Bus Master TX next Byte (23:16) Bus Master TX MS Byte (31:24) N Bus Master TX Reset ? Y DS2417 copies R/W Buffer to RTC Counter DS2417 TX Presence Pulse Bus Master TX Reset ? Y ...
Page 7
... MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 120s, one or more of the devices on the bus may be reset. Since the DS2417 gets all its energy for operation through its V for an extended time period ...
Page 8
... The presence pulse lets the bus master know that the DS2417 is on the bus and is ready to operate. For more details, see the “1-Wire Signaling” section. ...
Page 9
... Match ROM Search ROM Command Command ? ? Y DS2417 TX Bit 0 Master TX Bit 0 DS2417 TX Bit 0 Master TX Bit Bit 0 Bit 0 Match ? Match ? Y DS2417 TX Bit 1 Master TX Bit 1 DS2417 TX Bit 1 Master TX Bit Bit 1 Bit 1 Match ? Match ? Y DS2417 TX Bit 63 DS2417 TX Bit 63 Master TX Bit Bit 63 Bit 63 ...
Page 10
... DS2417 will sample the data line. For a read data time slot “0” transmitted, the delay circuit determines how long the DS2417 will hold the data line low. If the data bit is a “1”, the DS2417 will not hold the data line low at all. ...
Page 11
... SLOT 1 µs t < 15 µs LOW1 1 µs t < REC t SLOT DS2417 Sampling Window 15µs (OD: 2µs) (OD: 6µs) 60µs t LOW0 60 µs t < t < 120 µs LOW0 SLOT 1 µs t < ...
Page 12
... READ/WRITE TIMING DIAGRAM (continued) Figure 9 Read-data Time Slot V PULLUP V PULLUP MIN V IH MIN V IL MAX 0V RESISTOR MASTER DS2417 CRYSTAL PLACEMENT ON PCB Figure 10 LOCAL GROUND PLANE BENEATH SIGNAL PLANE OR ON OTHER SIDE OF PCB GND 1-Wire INT\ t SLOT Master Sampling Window LOWR ...
Page 13
INTERRUPT TIMING Figure 11 V INT Case A: Latency < 0.5 t LATENCY V INT t LATENCY The latency depends on the selected interrupt interval (IS0 to IS2 settings) and the contents of the RTC counter at the time of ...
Page 14
... Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to abso- lute maximum rating conditions for extended periods of time may affect reliability. DC ELECTRICAL CHARACTERISTICS PARAMETER ...
Page 15
... The duration of the low pulse sent by the master should be a minimum of 1μs with a maximum value as short as possible to allow time for the pull-up resistor to recover the line to a high level before the 1-Wire device samples in the case of a Write-One Time or before the master samples in the case of a Read-One Time ...