DS1672 Maxim, DS1672 Datasheet - Page 11

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DS1672

Manufacturer Part Number
DS1672
Description
The DS1672 low-voltage serial timekeeping chip incorporates a 32-bit counter and power-monitoring functions
Manufacturer
Maxim
Datasheet

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Figure 5. Programmable Trickle Charger
I
The DS1672 supports a bidirectional I
onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that controls
the message is called a master. The devices that are controlled by the master are slaves. The bus must be
controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates
the START and STOP conditions. The DS1672 operates as a slave on the I
are made via the open-drain I/O lines SDA and SCL. Within the bus specifications, a standard mode
(100kHz maximum clock rate) and a fast mode (400kHz maximum clock rate) are defined. The DS1672
operates in both modes.
The following bus protocol has been defined (Figure 6):
 Data transfer may be initiated only when the bus is not busy.
 During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
Accordingly, the following bus conditions have been defined:
2
BIT 7
C Serial Data Bus
V
TCS
CC
the data line while the clock line is high will be interpreted as control signals.
NOTE: ONLY 1010 ENABLES
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line from high to low, while the clock line is
high, defines a START condition.
Stop data transfer: A change in the state of the data line from low to high, while the clock line is
high, defines a STOP condition.
1 OF 16 SELECT
BIT 6
TCS
BIT 5
TRICKLE CHARGE REGISTER
TCS
BIT 4
TCS
BIT 3
DS
SELECT
1 OF 2
2
C bus and data transmission protocol. A device that sends data
BIT 2
DS
11 of 15
BIT 1
RS
SELECT
1 OF 3
BIT 0
RS
TCS = TRICKLE CHARGER SELECT
DS = DIODE SELECT
RS = RESISTOR SELECT
2
C bus. Connections to the bus
250Ω
R1
R2
2kΩ
R3
4kΩ
V
DS1672
BACKUP

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