DS1339 Maxim, DS1339 Datasheet
DS1339
Available stocks
Related parts for DS1339
DS1339 Summary of contents
Page 1
... GENERAL DESCRIPTION The DS1339 serial real-time clock (RTC low- power clock/date device with two programmable time- of-day alarms and a programmable square-wave output. Address and data are transferred serially 2 through bus. The clock/date provides seconds, minutes, hours, day, date, information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year ...
Page 2
... JC SYMBOL CONDITIONS DS1339-2 DS1339 DS1339-33 V BACKUP DS1339-2 V DS1339-3 PF DS1339- DS1339 I C Serial Real-Time Clock MIN TYP MAX UNITS 1.8 2.0 5.5 2.7 3.0 5.5 V 2.97 3.3 5.5 1.3 3.0 3 ...
Page 3
... A PARAMETER Input Leakage I/O Leakage Logic 0 Out V = 0.4V; V > V MIN (-3, -33 ≥ 2.0V (- Logic 0 Out 1.8V < V < 2.0V (DS1339-2) CC Logic 0 Out 1.3V < V < 1.8V (DS1339- Active Current CC V Standby Current (Note 6) CC Trickle-Charger Resistor Register 10h = A5h Typ BACKUP ...
Page 4
... Standard mode Fast mode t R Standard mode Fast mode t F Standard mode Fast mode t SU:STO Standard mode (Note 9) I/O t (Note 15) OSF DS1339 I C Serial Real-Time Clock MIN TYP MAX UNITS 100 400 kHz 100 1.3 µs 4.7 0.6 µs 4.0 1.3 µs 4.7 0.6 µs 4.0 0.6 µ ...
Page 5
... 0.0V trickle charger disabled R(MAX) ≤ 3.7V. DON'T CARE HIGH DS1339 I C Serial Real-Time Clock MIN TYP MAX UNITS 2 300 0 of the SCL signal) to bridge IHMIN ) of the SCL signal. LOW ≥ to 250ns must then be met. This is SU:DAT ...
Page 6
... SERIAL BUS INTERFACE AND ADDRESS SDA REGISTER 1Hz/4.096kHz/8.192kHz/32.768kHz 1Hz Oscillator and divider CONTROL LOGIC DS1339 DS1339 I C Serial Real-Time Clock SQW/INT MUX/ N BUFFER ALARM, TRICKLE CHARGE, AND CONTROL REGISTERS CLOCK AND CALENDAR REGISTERS USER BUFFER (7 BYTES) ...
Page 7
... I BAT OSC2 I 1 BAT OSC (SQWE = 0) 150 100 50 3.3 3.8 4.3 4.8 5.3 1.8 (V) V =0V Oscillator Frequency vs. Supply Voltage CC = 3.0V 32768.5 32768.4 32768.3 32768.2 INTCN = 0 32768.1 32768 DS1339 I C Serial Real-Time Clock I vs SCL=400kHz I CCA SCL=SDA=0Hz I CCS 2.3 2.8 3.3 3.8 4.3 4.8 5.3 V (V) CC 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Oscillator Supply Voltage (V) ...
Page 8
... An external 32.768kHz oscillator can also drive the L DS1339. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is left unconnected. For more information about crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks ...
Page 9
... OPERATION The DS1339 operates as a slave device on the serial bus. Access is obtained by implementing a START condition and providing a device identification code followed by data. Subsequent registers can be accessed sequentially until a STOP condition is executed. The device is fully accessible and data can be written and read when V greater than V ...
Page 10
... Refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks for detailed information DS1339C ONLY The DS1339C integrates a standard 32,768Hz crystal in the package. Typical accuracy at nominal V is approximately 10ppm. Refer to Application Note 58 for information about crystal accuracy vs. temperature. Figure 4. Typical PC Board Layout for Crystal ...
Page 11
... ADDRESS MAP Table 3 shows the address map for the DS1339 registers. During a multibyte access, when the address pointer reaches the end of the register space (10h), it wraps around to location 00h pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run ...
Page 12
... The time and date are set or initialized by writing the appropriate register bytes. The contents of the time and date registers are in the BCD format. The DS1339 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12- or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM ...
Page 13
... SPECIAL-PURPOSE REGISTERS The DS1339 has two additional registers (control and status) that control the RTC, alarms, and square-wave output. CONTROL REGISTER (0Eh) BIT 7 BIT 6 EOSC 0 BBSQI Bit 7: Enable Oscillator (EOSC). This bit when set to logic 0 starts the oscillator. When this bit is set to a logic 1, the oscillator is stopped ...
Page 14
... A1IE bit is a logic 1 and the INTCN bit is set to a logic 1, the SQW/INT pin is also asserted. A1F is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value unchanged. BIT 5 BIT 4 BIT are insufficient to support oscillation. BACKUP DS1339 I C Serial Real-Time Clock BIT 2 BIT 1 BIT 0 0 A2F A1F ...
Page 15
... DS1339 I C Serial Real-Time Clock and V CC FUNCTION Disabled Disabled Disabled No diode, 250Ω resistor One diode, 250Ω resistor No diode, 2kΩ resistor One diode, 2kΩ resistor No diode, 4kΩ resistor One diode, 4kΩ ...
Page 16
... I C bus. Within the bus specifications, a standard mode (100kHz cycle rate) and a fast mode (400kHz cycle rate) are defined. The DS1339 works in both modes. Connections to the bus are made via the open-drain I/O lines SDA and SCL. The following bus protocol has been defined ...
Page 17
... After receiving and decoding the slave address byte the slave outputs an acknowledge on the SDA line. After the DS1339 acknowledges the slave address + write bit, the master transmits a register address to the DS1339. This 2 ...
Page 18
... Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the DS1339 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer byte received after the START condition is generated by the master ...
Page 19
... HANDLING, PCB LAYOUT, AND ASSEMBLY The DS1339C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal. Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line ...
Page 20
... Updated the soldering temperature and added lead temperature information to the Absolute Maximum Ratings section; added the Package Thermal Characteristics section and updated the µSOP θ the V max numbers from 2.2V to 5.5V for DS1339-2 and 3.3V to 5.5V for CC DS1339-3 in the Recommended DC Operating Conditions table. 4/11 Updated the I ...