EP2AGX65DF25I3N Altera Corporation, EP2AGX65DF25I3N Datasheet - Page 27
EP2AGX65DF25I3N
Manufacturer Part Number
EP2AGX65DF25I3N
Description
IC ARRIA II GX FPGA 65K 572FBGA
Manufacturer
Altera Corporation
Series
Arria II GXr
Datasheet
1.EP2AGX95EF35C5N.pdf
(90 pages)
Specifications of EP2AGX65DF25I3N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5371904
Number Of I /o
252
Number Of Gates
-
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
572-FBGA
Lead Free Status
Lead free
Rohs Status
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
Table 1–30. Differential HSTL I/O Standards for Arria II GX Devices
Table 1–31. Differential HSTL I/O Standards for Arria II GZ Devices
Table 1–32. Differential I/O Standard Specifications for Arria II GX Devices
December 2011 Altera Corporation
HSTL-18 Class I
HSTL-15 Class I, II
HSTL-12 Class I, II
HSTL-18 Class I
HSTL-15 Class I, II
HSTL-12 Class I, II
2.5 V
LVDS
RSDS
Mini-
LVDS
LVPECL
Notes to
(1) The 1.5 V PCML transceiver I/O standard specifications are described in
(2) V
(3) R
(4) The RSDS and mini-LVDS I/O standards are only supported for differential outputs.
(5) The LVPECL input standard is supported at the dedicated clock input pins (GCLK) only.
Standard
(4)
(5)
I/O
I/O Standard
I/O Standard
IN
L
(4)
range: 90 <= RL <= 110 .
range: 0 <= V
Table
2.375
2.375
2.375
2.375
1–32:
Min
IN
V
CCIO
<= 1.85 V.
Typ
2.5
2.5
2.5
2.5
Table 1–30
Table 1–31
Table 1–32
1.425
1.425
(V)
1.71
1.14
1.71
1.14
Min
Min
2.625
2.625
2.625
2.625
Max
V
V
CCIO
CCIO
Typ
1.8
1.5
1.2
Typ
1.8
1.5
1.2
(V)
lists the HSTL I/O standards for Arria II GX devices.
lists the HSTL I/O standards for Arria II GZ devices.
lists the differential I/O standard specifications for Arria II GX devices.
(V)
Min
100
300
—
—
1.575
Max
1.89
1.26
1.575
1.89
1.26
Max
V
ID
1.25 V
Cond.
V
0.16
(mV)
CM
—
—
—
Min
0.2
0.2
V
0.16
Min
0.2
0.2
DIF(DC)
V
=
DIF(DC)
Max
Max
—
—
—
(V)
—
—
—
—
V
+ 0.3
Max
(V)
—
—
CCIO
0.71
0.85
Min
0.05
Min
—
V
0.6
—
—
0.78
0.68
ICM
Min
—
“Transceiver Performance Specifications” on page
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
V
(V)
X(AC)
0.5 ×
V
Typ
—
—
V
Max
1.80
CCIO
1.8
—
—
X(AC)
(2)
0.5 ×
V
Typ
—
—
CCIO
(V)
(V)
Max
0.95
0.79
0.247
—
(Note 1)
0.25
Min
0.1
—
Max
1.12
0.9
—
V
OD
V
0.88
0.71
0.48
Min
CCIO
Typ
0.2
×
(V)
—
—
—
0.4 ×
V
0.78
0.68
Min
CCIO
(3)
V
CM(DC)
0.5 ×
V
Max
Typ
0.6
0.6
0.6
—
—
—
CCIO
V
CM(DC)
0.5 ×
V
(V)
Typ
—
—
CCIO
0.52 ×
1.125
V
0.95
0.79
Max
Min
(V)
0.5
—
CCIO
1
0.6 ×
V
Max
1.12
1–21.
0.9
CCIO
V
OCM
Min
1.25
0.4
0.4
0.3
Typ
V
1.2
1.2
—
DIF(AC)
(V)
Min
0.4
0.4
0.3
V
Max
1.375
DIF(AC)
(V)
—
—
—
Max
1.4
1.4
1–19
—
V
Max
0.48
(V)
—
—
CCIO
+