EP2AGX65CU17I5 Altera Corporation, EP2AGX65CU17I5 Datasheet - Page 81
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EP2AGX65CU17I5
Manufacturer Part Number
EP2AGX65CU17I5
Description
IC ARRIA II GX FPGA 65K 358UBGA
Manufacturer
Altera Corporation
Series
Arria II GXr
Datasheet
1.EP2AGX95EF35C5N.pdf
(90 pages)
Specifications of EP2AGX65CU17I5
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5371904
Number Of I /o
156
Number Of Gates
-
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
358-UBGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: Device Datasheet for Arria II Devices
I/O Timing
I/O Timing
December 2011 Altera Corporation
f
Altera offers two ways to determine I/O timing:
■
■
The Microsoft Excel-based I/O Timing provides pin timing performance for each
device density and speed grade. The data is typically used prior to designing the
FPGA to get an estimate of the timing budget as part of the link timing analysis. The
Quartus II timing analyzer provides a more accurate and precise I/O timing data
based on the specifics of the design after place-and-route is complete.
The Microsoft Excel-based I/O Timing spreadsheet is downloadable from the
Literature: Arria II Devices
Using the Microsoft Excel-based I/O Timing.
Using the Quartus II Timing Analyzer.
web page.
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
1–73