EP4CGX110DF27C7 Altera Corporation, EP4CGX110DF27C7 Datasheet - Page 32
![no-image](/images/manufacturer_photos/0/0/41/altera_corporation_sml.jpg)
EP4CGX110DF27C7
Manufacturer Part Number
EP4CGX110DF27C7
Description
IC CYCLONE IV FPGA 110K 672FBGA
Manufacturer
Altera Corporation
Series
CYCLONE® IV GXr
Datasheet
1.EP4CE15F23C7N.pdf
(44 pages)
Specifications of EP4CGX110DF27C7
Number Of Logic Elements/cells
109424
Number Of Labs/clbs
6839
Total Ram Bits
5621760
Number Of I /o
393
Number Of Gates
-
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-BBGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1–32
Table 1–35. Emulated LVDS Transmitter Timing Specifications for Cyclone IV Devices
Table 1–36. LVDS Receiver Timing Specifications for Cyclone IV Devices
Cyclone IV Device Handbook,
Volume 3
f
clock
frequency)
HSIODR
t
TCCS
Output jitter
(peak to peak)
t
Notes to
(1) Cyclone IV E—emulated LVDS transmitter is supported at the output pin of all I/O Banks.
(2) t
(3) Cyclone IV E 1.0 V core voltage devices only support C8L, C9L, and I8L speed grades. Cyclone IV E 1.2 V core voltage devices only support
f
clock
frequency)
HSIODR
HSCLK
DUTY
LOCK
HSCLK
Symbol
Symbol
Cyclone IV GX—emulated LVDS transmitter is supported at the output pin of I/O Banks 3, 4, 5, 6, 7, 8, and 9.
C6, C7, C8, I7, and A7 speed grades. Cyclone IV GX devices only support C6, C7, C8, and I7 speed grades.
LOCK
(2)
(input
(input
Table
is the time required for the PLL to lock from the end-of-device configuration.
1–35:
Modes
Modes
×10
×10
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
—
—
—
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
C6
C6
402.5
402.5
437.5
437.5
437.5
437.5
437.5
437.5
437.5
Max
Max
320
320
320
320
320
640
640
640
640
640
200
500
875
875
875
875
875
55
1
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
C7, I7
C7, I7
402.5
402.5
402.5
402.5
Max
Max
320
320
320
320
320
640
640
640
640
640
200
500
370
370
370
370
370
740
740
740
740
740
55
1
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
C8, A7
C8, A7
402.5
402.5
402.5
402.5
Max
275
275
275
275
275
550
550
550
550
550
200
550
Max
320
320
320
320
320
640
640
640
640
640
55
1
(1),
(3)
Min
100
(Part 1 of 2)—Preliminary
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
C8L, I8L
C8L, I8L
(1),
Chapter 1: Cyclone IV Device Datasheet
Max
275
275
275
275
275
362
550
550
550
550
550
362
200
600
Max
320
320
320
320
320
362
640
640
640
640
640
362
55
(3)
1
November 2011 Altera Corporation
—Preliminary
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
Min
100
10
10
10
10
10
10
80
70
40
20
10
Switching Characteristics
C9L
C9L
Max
250
250
250
250
250
265
500
500
500
500
500
265
200
700
Max
250
250
250
250
250
265
500
500
500
500
500
265
55
1
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ms
ps
ps
%