LT1714CGN Linear Technology, LT1714CGN Datasheet - Page 9

IC COMP R-RINOUT DUAL 16-SSOP

LT1714CGN

Manufacturer Part Number
LT1714CGN
Description
IC COMP R-RINOUT DUAL 16-SSOP
Manufacturer
Linear Technology
Series
UltraFast™r
Type
General Purposer
Datasheet

Specifications of LT1714CGN

Number Of Elements
2
Output Type
CMOS, Complementary, Rail-to-Rail, TTL
Voltage - Supply
2.4 V ~ 12 V, ±2.4 V ~ 6 V
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
Poor trace routes and high source impedances are also
common sources of problems. Keep trace lengths as
short as possible and avoid running any output trace
adjacent to an input trace to prevent unnecessary cou-
pling. If output traces are longer than a few inches,
provide proper termination impedances (typically 100
to 400 ) to eliminate any reflections that may occur. Also
keep source impedances as low as possible, preferably
much less than 1k .
The input and output traces should also be isolated from
one another. Power supply traces can be used to achieve
U
U
Figure 1. Typical LT1714 Topside Metal for Multilayer PCB Layout
W
U
this isolation as shown in Figure 1, a typical topside layout
of the LT1713/LT1714 on a multilayer PC board. Shown is
the topside metal etch including traces, pin escape vias and
the land pads for a GN16 LT1713/LT1714 and its adjacent
X7R 0805 bypass capacitors. The V
all shield the inputs from the outputs. Although the two V
pins are connected internally, they should be shorted to-
gether externally as well in order for both to function as
shields. The same is true for the two V
pins are not connected internally, but in most applications
they are both connected directly to the ground plane.
1714 F01
LT1713/LT1714
+
, V
+
pins. The two GND
and GND traces
9

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