MAX941CSA+ Maxim Integrated Products, MAX941CSA+ Datasheet - Page 3

IC COMPARATOR SNGL 3V/5V 8-SOIC

MAX941CSA+

Manufacturer Part Number
MAX941CSA+
Description
IC COMPARATOR SNGL 3V/5V 8-SOIC
Manufacturer
Maxim Integrated Products
Type
with Latchr
Datasheet

Specifications of MAX941CSA+

Number Of Elements
1
Output Type
CMOS, Push-Pull, TTL
Voltage - Supply
2.7 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Number Of Channels
1 Channel
Supply Voltage (max)
5 V
Supply Voltage (min)
3 V
Supply Current (max)
700 uA
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Propagation Delay Time
80 ns
Comparator Type
High Speed
No. Of Comparators
1
Response Time
80ns
Ic Output Type
CMOS, TTL
Supply Current
430µA
Supply Voltage Range
2.7V To 5.5V
Amplifier Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 2.7V to 5.5V, T
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10: Specified as the difference between t
Note 11: Applies to the MAX941 only for both
Note 12: Applies to the MAX941 only. Comparator is active with
Note 13: Applicable to the MAX941 only. Comparator is active with
Note 14: The MAX941_UA and MAX942_UA are 100% production tested at T
Supply Current per Comparator
Power Dissipation per
Comparator
Propagation Delay
Differential Propagation Delay
Propagation Delay Skew
Logic Input Voltage High
Logic Input Voltage Low
Logic Input Current
Data-to-Latch Setup Time
Latch-to-Data Hold Time
Latch Pulse Width
Latch Propagation Delay
Shutdown Time
Shutdown Disable Time
PARAMETER
Inferred from the CMRR test. Note also that either or both inputs can be driven to the absolute maximum limit (0.3V
beyond either supply rail) without damage or false output inversion.
The input-referred trip points are the extremities of the differential input voltage required to make the comparator output
change state. The difference between the upper and lower trip points is equal to the width of the input-referred hysteresis
zone (see Figure 1).
V
The polarity of I
detail.
Specified over the full common-mode range (V
Applies to the MAX941 only when in shutdown mode. Specification is for current flowing into or out of the output pin for
V
Typical power dissipation specified with V+ = 3V; maximum with V+ = 5.5V.
Parameter is guaranteed by design and specified with V
source current. V
Specified between any two channels in the MAX942/MAX944.
(see Figure 2).
low. Shutdown disable time is the delay when
guaranteed by design.
OS
OUT
High-Speed, Low-Power, 3V/5V, Rail-to-Rail,
is defined as the center of the input-referred hysteresis zone (see Figure 1).
driven to any voltage from V+ to GND.
A
_______________________________________________________________________________________
= T
MIN
B
OS
reverses direction as V
to T
is added to the overdrive voltage for low values of overdrive (see Figure 2).
MAX
SYMBOL
I
t
IL
, unless otherwise noted. Typical values are at T
dt
t
t
PD+
t
I
V
LPW
PD
V
LPD
PD-
CC
t
t
, I
H
PD
IH
S
IL
IH
,
V+ = 3V
V+ = 5V
MAX941 only, shutdown mode (V+ = 3V)
(Note 7)
(Note 8)
(Note 9)
(Note 10)
(Note 11)
(Note 11)
V
(Note 12)
(Note 12)
MAX941 only
MAX941 only
(Note 13)
(Note 13)
S
PD+
LOGIC
H
D
CM
N
and t
and
approaches either supply rail. See Typical Operating Characteristics for more
= 0 or V+ (Note 11)
S
CMR
PD-
Single-Supply Comparators
H
L
D
A
for any one comparator.
N
T
).
C
CONDITIONS
is driven high to the time the output is valid.
H
L
pins.
A
OD
MAX941
MAX942/MAX944
MAX941
MAX942/MAX944
MAX941
MAX942/MAX944
MAX94_C
MAX94_E/A, MAX942MSA
T
S
C
H
= 5mV and C
H
D
N
pin driven high and is latched with
pin driven high and is in shutdown with
A
= +25°C. Specifications over temperature are
LOAD
A
= +25°C.) (Note 14)
= 15pF in parallel with 400µA of sink or
V
2
+
MIN
+ 0.4
TYP
380
350
430
400
1.0
1.0
12
80
80
10
10
20
30
50
70
10
V
V
2
2
2
3
L
+
+
A
T
C
H
V
S
2
+
MAX
pin driven low
H
600
500
700
600
150
200
4.2
3.6
60
10
- 0.4
D
N
pin driven
UNITS
mW
µA
µA
ns
ns
ns
ns
ns
ns
ns
µs
µs
V
V
3

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