E-TDA7590TR STMicroelectronics, E-TDA7590TR Datasheet - Page 24

• Manufacturer Part Number: E-TDA7590TR
• Description: IC DSP SPEECH/AUDIO 144-TQFP
• Manufacturer: STMicroelectronics
• Type: Signalr

Specifications of E-TDA7590TR

• Applications: Speech Recognition
• Mounting Type: Surface Mount
• Package / Case: 144-TQFP Exposed Pad, 144-eTQFP, 144-HTQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix 1
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;;; Bit Definitions for M_TCS
TUFCL
TDE
TUFL
;Reserved
TXIE
TDWE
TREL
TCKP
TLRS
TDIR
TWL1
TWL0
;Reserved
TMME
T2EN
T1EN
T0EN
;------------------------------------------------------------------------
;
;------------------------------------------------------------------------
CODEC_CSR
;;; Bit Definitions for CODEC
GADCL_0
GADCL_1
GADCL_2
GADCR_0
GADCR_1
GADCR_2
GDACL_0
GDACL_1
GDACL_2
GDACR_0
GDACR_1
GDACR_2
MUTEDAC
PDNDAC
PDNADC
N_RST
;------------------------------------------------------------------------
;
;------------------------------------------------------------------------
PLL_CSR
PLL_FCR
PLL_CLKCTL
;;; Bit Definitions for PLL_CSR
IDF0
IDF1
IDF2
IDF3
IDF4
; Reserved
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQUATES for CODEC
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQUATES for PLL
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
16
15
14
12
11
10
9
8
7
6
5
3
2
1
0
$FFFFCB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
$FFFFD7
$FFFFD6
$FFFFD5
0
1
2
3
4
; Transmitter Data Overflow Clear
; Transmitter Data Ready
; Transmitter Data Overflow
; Transmitter Interrupt Enable
; Transmitter Data Word Justification
; Transmitter Relative Timing
; Transmitter Clock Polarity
; Transmitter Left Right Selection
; Transmitter Data Shift Direction
; Transmitter Word Length Control 1
; Transmitter Word Length Control 0
; Transmitter Master Mode Enable
; Transmitter 2 enable
; Transmitter 1 enable
; Transmitter 0 enable
; CODEC Control Register Address
; ADC Left
; ADC Left
; ADC Left
; ADC Right Gain Bit 0
; ADC Right Gain Bit 1
; ADC Right Gain Bit 2
; DAC Left
; DAC Left
; DAC Left
; DAC Right Gain Bit 0
; DAC Right Gain Bit 1
; DAC Right Gain Bit 2
; Mute DAC - Active Hi, Reset Val = 1
; Power down DAC - Active Hi, Reset Val = 0
; Power down ADC - Active Hi, Reset Val = 0
; Asynchronoue Reset - Active Lo, Reset Val = 1
; PLL Control/Status Register
; PLL Fractional Register
; PLL Clock Control Register
; Input Divide Factor 0
; Input Divide Factor 1
; Input Divide Factor 2
; Input Divide Factor 3
; Input Divide Factor 4
Gain Bit 0
Gain Bit 1
Gain Bit 2
Gain Bit 0
Gain Bit 1
Gain Bit 2
TDA7590