ADP320 Analog Devices, ADP320 Datasheet - Page 5

• Manufacturer Part Number: ADP320
• Description: Triple, 200 mA, Low Noise, High PSRR Voltage Regulator
• Manufacturer: Analog Devices

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN1/VIN2, VIN3, VBIAS to GND
VOUT1, VOUT2 to GND
VOUT3 to GND
EN1, EN2, EN3 to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP320 triple LDO can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temper-
ature does not guarantee that the junction temperature (T
is within the specified temperature limits. In applications
with high power dissipation and poor thermal resistance the
maximum ambient temperature may have to be derated. In
applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits.
The junction temperature (T
the ambient temperature (T
device (P
the package (θ
calculated from the ambient temperature (T
pation (P
T
J
= T
D
D
), and the junction-to-ambient thermal resistance of
) using the following formula:
A
+ (P
JA
). Maximum junction temperature (T
D
× θ
JA
)
A
J
), the power dissipation of the
) of the device is dependent on
A
Rating
–0.3 V to +6.5 V
–0.3 V to VIN1/VIN2
–0.3 V to VIN3
–0.3 V to +6.5 V
–65°C to +150°C
–40°C to +125°C
JEDEC J-STD-020
) and power dissi-
J
) is
J
)
Rev. A | Page 5 of 20
Junction-to-ambient thermal resistance (θ
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
on PCB material, layout, and environmental conditions. The
specified values of θ
circuit board. Refer to JEDEC JESD 51-9 for detailed informa-
tion on the board construction. For additional information, see
the AN-617 Application Note, MicroCSP™ Wafer Level Chip
Scale Package.
Ψ
with units of °C/W. Ψ
calculation using a 4-layer board. The JESD51-12, Guidelines
for Reporting and Using Package Thermal Information, states
that thermal characterization parameters are not the same as
thermal resistances. Ψ
through multiple thermal paths rather than a single path as in
thermal resistance, θ
convection from the top of the package as well as radiation
from the package; factors that make Ψ
world applications. Maximum junction temperature (T
calculated from the board temperature (T
dissipation (P
Refer to JEDEC JESD51-8 and JESD51-12 for more detailed
information about Ψ
THERMAL RESISTANCE
θ
device soldered in a circuit board for surface-mount packages.
Table 4.
Package Type
16-Lead 3 mm × 3 mm LFCSP
ESD CAUTION
JA
JB
and Ψ
is the junction to board thermal characterization parameter
T
J
= T
JB
B
are specified for the worst-case conditions, that is, a
+ (P
D
) using the following formula
D
× Ψ
JA
JB
JB
JB
are based on a four-layer, 4-inch × 3-inch
. Therefore, Ψ
JB
JB
.
)
of the package is based on modeling and
measures the component power flowing
JB
thermal paths include
JB
JA
θ
49.5
more useful in real-
may vary, depending
JA
B
JA
) and power
) of the package is
Ψ
25.2
JB
ADP320
J
) is
Unit
°C/W