ADUC836 Analog Devices, ADUC836 Datasheet - Page 12

• Manufacturer Part Number: ADUC836
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + Dual 16-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC836

• Mcu Core: 8052
• Mcu Speed (mips): 1
• Sram (bytes): 2304Bytes
• Gpio Pins: 34
• Adc # Channels: 4
• Other: PWM

52-Lead 56-Lead
MQFP
40
41
42
43–46
49–52
*I = Input, O = Output, S = Supply.
ADuC836
Pin No. Pin No.
CSP
43
44
45
46–49
52–55
Mnemonic
EA
PSEN
ALE
P0.0–P0.7
(AD0–AD3)
Type* Description
I/O
O
O
I/O
PIN FUNCTION DESCRIPTIONS (continued)
External Access Enable, Logic Input. When held high, this input enables the device to
fetch code from internal program memory locations 0000h to F7FFh. When held low,
this input enables the device to fetch all instructions from external program memory.
To determine the mode of code execution, i.e., internal or external, the EA pin is
sampled at the end of an external RESET assertion or as part of a device power cycle.
EA may also be used as an external emulation I/O pin, and therefore the voltage level
at this pin must not be changed during normal mode operation as it may cause an
emulation interrupt that will halt code execution.
Program Store Enable, Logic Output. This output is a control signal that enables the
external program memory to the bus during external fetch operations. It is active every
six oscillator periods except during external data memory accesses. This pin remains
high during internal program execution. PSEN can also be used to enable Serial
Download mode when pulled low through a resistor at the end of an external RESET
assertion or as part of a device power cycle.
Address Latch Enable, Logic Output. This output is used to latch the low byte (and
page byte for 24-bit data address space accesses) of the address to external memory
during external code or data memory access cycles. It is activated every six oscillator
periods except during an external data memory access. It can be disabled by setting
the PCON.4 bit in the PCON SFR.
These pins are part of Port 0, which is an 8-bit, open-drain, bidirectional
I/O port. Port 0 pins that have 1s written to them float and in that state can be used
(AD4–AD7)as high impedance inputs. An external pull-up resistor will be required
on P0 outputs to force a valid logic high level externally. Port 0 is also the multiplexed
low order address and data bus during accesses to external program or data memory.
In this application, it uses strong internal pull-ups when emitting 1s.
–12–
REV. A