ADM1068 Analog Devices, ADM1068 Datasheet

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ADM1068

Manufacturer Part Number
ADM1068
Description
Compact Multi- Voltage Sequencer and Supervisor
Manufacturer
Analog Devices
Datasheet

Specifications of ADM1068

# Supplies Monitored
8
Volt Monitoring Accuracy
1%
# Output Drivers
8
Fet Drive/enable Output
Both
Package
32 ld LQFP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADM1068ASTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADM1068ASTZ-REEL7
Manufacturer:
Analog Devices Inc
Quantity:
10 000
FEATURES
Complete supervisory and sequencing solution for up to
8 supply fault detectors enable supervision of supplies to
4 selectable input attenuators allow supervision of supplies to
4 dual-function inputs, VX1 to VX4 (VXx)
8 programmable driver outputs, PDO1 to PDO8 (PDOx)
Sequencing engine (SE) implements state machine control of
Device powered by the highest of VPx, VH for improved
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 32-lead 7 mm × 7 mm LQFP
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
For more information about the ADM1068 register map,
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
8 supplies
<1.0% accuracy across all voltages and temperatures
14.4 V on VH
6 V on VP1 to VP3 (VPx)
High impedance input to supply fault detector with
General-purpose logic input
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
PDO outputs
redundancy
refer to the AN-721 Application Note at www.analog.com.
<0.5% accuracy at all voltages at 25°C
thresholds between 0.573 V and 1.375 V
N-FET (PDO1 to PDO6 only)
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The ADM1068 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple supply systems.
The device also provides up to eight programmable inputs for
monitoring undervoltage faults, overvoltage faults, or out-of-
window faults on up to eight supplies. In addition, eight
programmable outputs can be used as logic enables. Six of these
programmable outputs can also provide up to a 12 V output for
driving the gate of an N-FET that can be placed in the path of
a supply.
The logical core of the device is a sequencing engine. This state-
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
The ADM1068 is controlled via configuration data that can be
programmed into an EEPROM. The whole configuration can
be programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.
Super Sequencer and Monitor
VDDCAP
AGND
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
ARBITRATOR
PROGRAMMABLE
FUNCTIONAL BLOCK DIAGRAM
(LOGIC INPUTS
GENERATORS
ADM1068
FUNCTION
VDD
INPUTS
RESET
DUAL-
(SFDs)
SFDs)
OR
©2005–2011 Analog Devices, Inc. All rights reserved.
VCCP
SEQUENCING
REFOUT REFGND
Figure 1.
GND
ENGINE
VREF
(HV CAPABLE OF
CONFIGURABLE
CONFIGURABLE
LOGIC SIGNALS)
DRIVING GATES
SDA SCL A1
(LV CAPABLE
OF DRIVING
OF N-FET)
ADM1068
DRIVERS
DRIVERS
OUTPUT
OUTPUT
INTERFACE
SMBus
www.analog.com
EEPROM
A0
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDOGND

Related parts for ADM1068

ADM1068 Summary of contents

Page 1

... This design enables very flexible sequencing of the outputs, based on the condition of the inputs. The ADM1068 is controlled via configuration data that can be programmed into an EEPROM. The whole configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc. ...

Page 2

... B to Rev. C Changes to Serial Bus Timing Parameter in Table 1.................... 4 Changes to Ordering Guide .......................................................... 24 5/08—Rev Rev. B Changes to Table 1............................................................................ 4 Changes to Powering the ADM1068 Section ............................. 10 Changes to Default Output Configuration Section ................... 13 Changes to Sequence Detector Section ....................................... 16 Changes to Table 9.......................................................................... 19 Changes to Figure 35 and Error Correction Section ................. 23 Changes to Ordering Guide ...

Page 3

... REG 5.25V CHARGE PUMP VDD GND VCCP Figure 2. Detailed Block Diagram Rev Page SMBus OSC DEVICE EEPROM CONFIGURABLE PDO1 OUTPUT DRIVER (HV) PDO2 PDO3 PDO4 PDO5 CONFIGURABLE OUTPUT DRIVER PDO6 (HV) CONFIGURABLE OUTPUT DRIVER PDO7 (LV) CONFIGURABLE PDO8 OUTPUT DRIVER (LV) PDOGND ADM1068 ...

Page 4

... ADM1068 SPECIFICATIONS 3 14 VPx = 3 6.0 V Table 1. Parameter POWER SUPPLY ARBITRATION VH, VPx VPx VH VDDCAP C VDDCAP POWER SUPPLY Supply Current VPx Additional Currents All PDO FET Drivers On Current Available from VDDCAP EEPROM Erase Current SUPPLY FAULT DETECTORS VH Pin Input Impedance Input Attenuator Error ...

Page 5

... μA VDDCAP = 4. 2.0 V 0 OUT 400 kHz 1.3 μs 0.6 μs 0.6 μs 0.6 μs 1.3 μs 0.6 μs 300 ns 300 ns 100 μ μs Rev Page ADM1068 = 25°C, if known logic state is required A = −3.0 mA ...

Page 6

... ADM1068 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Voltage on VH Pin Voltage on VPx Pins Voltage on VXx Pins Voltage on A0, A1 Pins Voltage on REFOUT Pin Voltage on VDDCAP, VCCP Pins Voltage on PDOx Pins Voltage on SDA, SCL Pins Voltage on GND, AGND, PDOGND, REFGND Pins Input Current at Any Pin ...

Page 7

... In a typical application, all ground pins are connected together VX1 PDO1 PIN 1 VX2 PDO2 INDICATOR VX3 PDO3 ADM1068 VX4 PDO4 TOP VIEW VP1 PDO5 (Not to Scale) VP2 PDO6 VP3 PDO7 VH PDO8 CONNECT Figure 3. Pin Configuration Rev Page ADM1068 ...

Page 8

... ADM1068 TYPICAL PERFORMANCE CHARACTERISTICS (V) VP1 Figure 4. V vs. V VDDCAP (V) VH Figure 5. V vs. V VDDCAP 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 (V) VP1 Figure 6. I vs. V (VP1 as Supply) VP1 VP1 VP1 ...

Page 9

... LOAD 2.058 2.053 VP1 = 5V 2.048 2.043 2.038 5 6 –40 LOAD Rev Page ADM1068 VP1 = 5V VP1 = (µA) LOAD Figure 12. V (Weak Pull-Up to VPx) vs. I PDO1 LOAD VP1 = 3.0V VP1 = 4.75V – TEMPERATURE (°C) Figure 13. REFOUT vs. Temperature ...

Page 10

... A supply comparator chooses the highest input to provide the on-chip supply. There is minimal switching loss with this architecture (~0.2 V), resulting in the ability to power the ADM1068 from a supply as low as 3.0 V. Note that the supply on the VXx pins cannot be used to power the device. An external capacitor to GND is required to decouple the on-chip supply from noise ...

Page 11

... Table 6 shows the details of each input. PROGRAMMING THE SUPPLY FAULT DETECTORS The ADM1068 can have up to eight SFDs on its eight input channels. These highly programmable reset generators enable the supervision eight supply voltages. The supplies can be as low as 0 ...

Page 12

... VXx input pins on the ADM1068 have dual functionality. The second function digital logic input to the device. Therefore, the ADM1068 can be configured for up to four digital inputs. These inputs are TTL-/CMOS-compatible. Standard logic signals can be applied to the pins: RESET from reset generators, PWRGD signals, fault flags, manual resets, and more ...

Page 13

... All of the internal registers in an unprogrammed ADM1068 device from the factory are set to 0. Because of this, the PDOx pins are pulled to GND by a weak (20 kΩ) on-chip pull-down resistor. As the input supply to the ADM1068 ramps up on VPx or VH, all PDOx pins behave as follows: • ...

Page 14

... If VP2 is not okay State DIS3V3. PWRGD If VX1 is high State DIS2V5. MONITOR FAULT The ADM1068 offers state definitions. The signals monitored to indicate the status of the input pins are the outputs of the SFDs. WARNINGS The SE also monitors warnings. These warnings can be ...

Page 15

... STATES EN3V3 10ms VP1 = 0 VP2 = 1 EN2V5 DIS3V3 20ms (VP1 + VP2 VX1 = 1 VP3 = 1 PWRGD DIS2V5 VP2 = 0 (VP1 + VP2 + VP3 VX1 = 1 VX1 = 1 FSEL1 (VP1 + VP2 VP3 = 0 FSEL2 VP2 = 0 Figure 21. Sample Application Flow Diagram DIS2V5 PWRGD FSEL1 ADM1068 FSEL2 ...

Page 16

... FAULT The ADM1068 also has a number of status registers. These include more detailed information, such as whether an undervoltage or overvoltage fault is present on a particular input. The status registers also include information on ADC limit faults. Note that the data in the status registers is not latched in any way and, therefore, is subject to change at any time ...

Page 17

... VX2 VX3 PWRGD PDO6 SIGNAL VALID PDO7 VX4 PDO8 VCCP VDDCAP REFOUT GND 10µF 10µF Figure 23. Applications Diagram Rev Page 12V OUT 5V OUT 3V OUT IN DC-TO-DC1 EN OUT 3.3V OUT IN DC-TO-DC2 EN OUT 1.25V OUT IN DC-TO-DC3 EN OUT 1.25V OUT 3.3V OUT IN LDO EN OUT 0.9V OUT ADM1068 ...

Page 18

... EEPROM contents to the RAM again, as described in Option 3, restoring the ADM1068 to its original configuration. The topology of the ADM1068 makes this type of operation possible ...

Page 19

... Address Pointer Register The address pointer register contains the address that selects one of the other internal registers. When writing to the ADM1068, the first byte of data is always a register address that is written to the address pointer register. Configuration Registers The configuration registers provide control and configuration for various operating parameters of the ADM1068 ...

Page 20

... ADM1068 The device also has several identification registers (read-only) that can be read across the SMBus. Table 10 lists these registers with their values and functions. Table 10. Identification Register Values and Functions Name Address Value Function MANID 0xF4 0x41 Manufacturer ID for Analog Devices ...

Page 21

... The ADM1068 uses the following SMBus write protocols. Send Byte In a send byte operation, the master device sends a single command byte to a slave device, as follows the ADM1068, the send byte protocol is used for two purposes: • • Rev Page ACK ...

Page 22

... In a block write operation, the master device writes a block of data to a slave device. The start address for a block write must have been set previously. In the ADM1068, a send byte opera- tion sets a RAM address, and a write byte/word operation sets an EEPROM address, as follows: 1 ...

Page 23

... EEPROM, a block write to the RAM/EEPROM block r from the RAM/ EEPROM. This option enables the user to verify that the data received by or sent from the ADM1068 is correct. The PEC byte is an optional byte sent after that last data byte has been written to or read from the ADM1068. The protocol ...

Page 24

... OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 0.05 ORDERING GUIDE 1 Model Temperature Range ADM1068ASTZ −40°C to +85°C ADM1068ASTZ-REEL7 −40°C to +85°C EVAL-ADM1068LQEBZ RoHS Compliant Part. ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 0.75 1.60 MAX 0.60 0. 0.20 0.09 7° ...

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