ADM691 Analog Devices, ADM691 Datasheet - Page 12

• Manufacturer Part Number: ADM691
• Manufacturer: Analog Devices

Specifications of ADM691

• Batt-backup-flg: Yes
• Product Description: Microprocessor Supervisor w/ Watchdog Timer, Reset Generator and Battery Steering
• Reset Threshold (v): 4.65
• Min Reset Timeout (ms): 35 (Adjustable)
• Reset Output-stage: Active-High/Push-Pull,Active-Low/Push-Pull
• Backup-battery Switch: Yes
• Chip Enable Gating: Yes
• Typ Watchdog Timeout (ms): 100,1600,adj.
• Package: DIP,SOIC
• Us Price 1000-4999: n/a

ADM690–ADM695
Note that the resistor will discharge the battery slightly. With a
V
battery this will draw around 700 nA. This will be negligible in
most cases.
Figure 22b. Preventing Spurious RESETS During Battery
Replacement
TYPICAL APPLICATIONS
ADM690, ADM692 AND ADM694
Figure 23 shows the ADM690/ADM692/ADM694 in a typical
power monitoring, battery backup application. V
CMOS RAM. Under normal operating conditions with V
present, V
occurs, V
thereby maintaining power for the CMOS RAM. A RESET
pulse is also generated when V
ADM690/ADM694 or 4.4 V for the ADM692. RESET will
remain low for 50 ms (200 ms for ADM694) after V
to 5 V.
The watchdog timer input (WDI) monitors an I/O line from the
verify correct software execution. Failure to toggle the line indi-
cates that the P system is not correctly executing its program
and may be tied up in an endless loop. If this happens, a reset
pulse is generated to initialize the processor.
If the watchdog timer is not needed, the WDI input should be
left floating.
The Power Fail Input, PFI, monitors the input power supply via
a resistive divider network. The voltage on the PFI input is com-
pared with a precision 1.3 V internal reference. If the input volt-
age drops below 1.3 V, a power fail output (PFO) signal is
generated. This warns of an impending power failure and may
be used to interrupt the processor so that the system may be
shut down in an orderly fashion. The resistors in the sensing
network are ratioed to give the desired power fail threshold
voltage V
P system. This line must be toggled once every 1.6 seconds to
CC
supply of 4.5 V, a suitable resistor is 4.3 M . With a 3 V
T
CC
BATTERY
OUT
.
will decay and V
is internally connected to V
V
R =(V
T
R
= (1.3 R
1
/R
R
CC
2
= (V
OUT
– 50 mV)/1 A
CC
1
V
/R
T
will be switched to V
BATT
falls below 4.65 V for the
/1.3) – 1
2
) + 1.3 V
ADM69x
CC
. If a power failure
OUT
CC
powers the
BATT
returns
CC
–12–
Figure 23a. ADM690/ADM692/ADM694 Typical Application
Circuit A
Figure 23b shows a similar application but in this case the PFI
input monitors the unregulated input to the 7805 voltage regu-
lator. This gives an earlier warning of an impending power fail-
ure. It is useful with processors operating at low speeds or
where there are a significant number of housekeeping tasks to be
completed before the power is lost.
Figure 23b. ADM690/ADM692/ADM694 Typical Application
Circuit B
ADM691, ADM693, ADM695
A typical connection for the ADM691/ADM693/ADM695 is
shown in Figure 24. CMOS RAM is powered from V
5 V power is present this is routed to V
V
V
can be added. When V
output goes low, providing up to 25 mA of base drive for the
external transistor. A 0.1 F capacitor is connected to V
supply the transient currents for CMOS RAM. When V
lower than V
backup battery to V
BATT
CC
POWER
V > 8V
INPUT
+5V
, but if more current is required, an external PNP transistor
BATTERY
is routed to V
BATTERY
R
R
1
2
R
R
1
2
BATT
+
, an internal 20
V
PFI
OUT
7805
OUT
BATT
V
PFI
BATT
CC
ADM690
ADM692
ADM694
.
. V
GND
ADM690
ADM692
ADM694
V
GND
is higher than V
CC
V
OUT
RESET
CC
RESET
V
+5V
PFO
WDI
OUT
V
PFO
WDI
can supply up to 100 mA from
OUT
MOSFET connects the
0.1 F
0.1 F
OUT
BATT
0.1 F
. If V
CMOS RAM
I/O LINE
P NMI
P RESET
POWER
CMOS RAM
I/O LINE
P NMI
P RESET
POWER
P SYSTEM
, the BATT ON
P SYSTEM
CC
P POWER
P POWER
fails then
OUT
CC
OUT
. When
REV. A
is
to