OP270 Analog Devices, OP270 Datasheet - Page 17

• Manufacturer Part Number: OP270
• Description: Low Noise Precision Dual Op Amp
• Manufacturer: Analog Devices

Specifications of OP270

• -3db Bandwidth: 5MHz
• Slew Rate: 2.4V/µs
• Vos: 50µV
• Ib: 15nA
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 3.2nV/rtHz
• Vcc-vee: 9V to 36V
• Isy Per Amplifier: 3.25mA
• Packages: DIP,SOIC

DIGITAL PANNING CONTROL
Figure 44 uses a
signal between two channels. One channel is formed by the
current output of DAC A driving one-half of an OP270 in a
current-to-voltage converter configuration. The other channel
is formed by the complementary output current of DAC A,
which normally flows to ground through the AGND pin. This
complementary current is converted to a voltage by the other
half of the OP270, which also holds AGND at virtual ground.
Gain error due to mismatching between the internal DAC
ladder resistors and the current-to-voltage feedback resistors is
eliminated by using feedback resistors internal to the DAC8221.
Only DAC A passes a signal; DAC B provides the second
feedback resistor. With V
voltage converter, using R
digital data reaching DAC B. Distortion of the digital panning
control is less than 0.002% over the 20 Hz to 20 kHz audio
range. Figure 45 shows the complementary outputs for a 1 kHz
input signal and a digital ramp applied to the DAC data input.
DUAL PROGRAMMABLE GAIN AMPLIFIER
The dual OP270 and the DAC8221 (a dual 12-bit CMOS DAC)
can be combined to form a space-saving, dual programmable
amplifier. The digital code present at the DAC, which is easily
set by a microprocessor, determines the ratio between the internal
feedback resistor and the resistance that the DAC ladder presents
to the op amp feedback loop. Gain of each amplifier is
where n is the decimal equivalent of the 12-bit digital code
present at the DAC.
If the digital code present at the DAC consists of all 0s, the
feedback loop opens, causing the op amp output to saturate. A
20 MΩ resistor placed in parallel with the DAC feedback loop
eliminates this problem with only a very small reduction in gain
accuracy.
V
V
IN
O
=
−
4096
n
DAC8221
REF
FBB
(a dual 12-bit CMOS DAC) to pan a
B unconnected, the current-to-
, is accurate and not influenced by
Rev. E | Page 17 of 20
CONTROL
WRITE
A OUT
A OUT
PINS 6 (MSB) TO 17 (LSB)
V
NC
IN
DAC DATA BUS
22
18
19
20
4
V
V
DAC A/DAC B
CS
WR
DAC8221P
REF
REF
5V
Figure 45. Digital Panning Control Output
A
B
Figure 44. Digital Panning Control
5V
DAC A
DAC B
DGND
+5V
V
DD
21
5
AGND
I
I
R
R
OUT
OUT
FBA
FBB
A
B
23
24
3
2
1
2
3
6
5
OP270GP
OP270GP
+15V
–15V
1/2
1/2
8
4
1ms
+
–
1
7
0.01µF
10µF
0.1µF
OP270
+
–
10µF
OUT
OUT