AD8041 Analog Devices, AD8041 Datasheet - Page 12

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AD8041

Manufacturer Part Number
AD8041
Description
160 MHz Rail-to-Rail Amplifier with Disable
Manufacturer
Analog Devices
Datasheet

Specifications of AD8041

Vcc-vee
3V to 12V
Isy Per Amplifier
6.5mA
Packages
SOIC,DIP
-3db Bandwidth
170MHz
Slew Rate
170V/µs
Vos
2mV
Ib
1.2µA
# Opamps Per Pkg
1
Input Noise (nv/rthz)
16nV/rtHz

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AD8041
Disable Operation
The AD8041 has an active-low disable pin, which can be used
to three-state the output of the part and also lower its supply
current. If the disable pin is left floating, the part is enabled and
will perform normally. If the disable pin is pulled to 2.5 V (min)
below the positive supply, output of the AD8041 will be disabled
and the nominal supply current will drop to less than 1.6 mA.
For best isolation, the disable pin should be pulled to as low a
voltage as possible; ideally, the negative supply rail.
The disable pin on the AD8041 allows it to be configured as a 2:1
mux as shown in Figure 7 and can be used to switch many types of
high speed signals. Higher order multiplexers can also be built.
The break-before-make switching time is approximately 50 ns to
disable the output and 300 ns to enable the output.
10MHz
5MHz
CH0
CH1
g
m
g
Vi
m
13
Vi
Figure 6. Small Signal Schematic
74HC04
12 11
Figure 7. 2:1 Multiplexer
R1
R1
330
330
S1N
S1P
C7
50
50
10
3
2
3
2
AD8041
AD8041
g
m2
8
8
5V
5V
7
7
C3
4
4
C9
R2
10 F
10 F
330
330
6
6
G = +2
G = +2
V
50
OUT
–12–
Single-Supply A/D Conversion
Figure 9 shows the AD8041 driving the analog inputs of the
AD9050 in a dc-coupled system with single-ended signals. All
components are powered from a single 5 V supply. The AD820
is used to offset the ground referenced input signal to the level
required by the AD9050. The AD8041 is used to add in the offset
with the ground referenced input signal and buffer the input to
AD9050. The nominal input range of the AD9050 is 2.8 V
and 3.8 V (1 V p-p centered at 3.3 V). This circuit provides
40 MSPS analog-to-digital conversion on just 330 mW of power
while delivering 10-bit performance.
–0.5V TO +0.5V
V
IN
–100
Figure 10. FFT Output of Circuit in Figure 9
Figure 9. 10-Bit, 40 MSPS A/D Conversion
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
Figure 8. 2:1 Multiplexer Performance
100
0%
90
10
0.1 F
1k
1k
V
1V
S
= 5V
1k
AD8041
1k
5V
AD820
F
FUNDAMENTAL = 0.6dB
SECOND HARMONIC = 66.9dB
THIRD HARMONIC = 74.7dB
SNR = 55.2dB
NOISE FLOOR = – 86.1dB
ENCODE FREQUENCY = 40MHz
1
5V
= 4.9MHz
2.8V – 3.8V
200ns
3.3V
9
10
0.1 F
AD9050
5V
REV. B

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