AD8000 Analog Devices, AD8000 Datasheet - Page 5

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AD8000

Manufacturer Part Number
AD8000
Description
1.5 GHz, Ultra-High Speed Op Amp with Power-Down
Manufacturer
Analog Devices
Datasheet

Specifications of AD8000

-3db Bandwidth
1580MHz
Slew Rate
4100V/µs
Vos
1mV
Ib
5µA
# Opamps Per Pkg
1
Input Noise (nv/rthz)
1.6nV/rtHz
Vcc-vee
4.5V to 12V
Isy Per Amplifier
14.3mA
Packages
CSP,SOIC

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ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature Range
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
fied for device soldered in the circuit board for surface-mount
packages.
Table 4. Thermal Resistance
Package Type
SOIC-8
3 mm × 3 mm LFCSP
Maximum Power Dissipation
The maximum safe power dissipation for the AD8000 is limited
by the associated rise in junction temperature (T
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit can change the stresses that the package
exerts on the die, permanently shifting the parametric perfor-
mance of the AD8000. Exceeding a junction temperature of
175°C for an extended period of time can result in changes
in silicon devices, potentially causing degradation or loss of
functionality.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy elec-
trostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation
and loss of functionality.
JA
(Soldering, 10 sec)
is specified for the worst-case conditions, that is, θ
θ
80
93
JA
Rating
12.6 V
See Figure 4
−V
±V
−65°C to +125°C
−40°C to +125°C
300°C
150°C
S
S
− 0.7 V to +V
θ
30
35
JC
J
) on the die. At
S
JA
Unit
°C/W
°C/W
+ 0.7 V
is speci-
Rev. A | Page 5 of 20
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the die
due to the AD8000 drive at the output. The quiescent power is
the voltage between the supply pins (V
current (I
RMS output voltages should be considered. If R
to −V
V
the worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
Also, more metal directly in contact with the package leads and
exposed paddle from metal traces, through holes, ground, and
power planes reduces θ
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle
SOIC (80°C/W) and the LFCSP (93°C/W) package on a JEDEC
standard 4-layer board. θ
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
S
× I
OUT
P
P
P
S
OUT
D
D
, as in single-supply operation, the total drive power is
D
3.0
2.5
2.0
1.5
1.0
0.5
= V
= Quiescent Power + (Total Drive Power – Load Power)
=
=
0
. If the rms signal levels are indeterminate, consider
S
–40
).
(
(
V
V
S
/2.
–30 –20 –10 0
S
S
×
×
I
I
S
S
)
)
+
+
(
V
V
OUT
AMBIENT TEMPERATURE (°C)
JA
S
2
R
10
S
/
.
JA
L
4
LFCSP
×
= V
)
values are approximations.
20
2
V
R
SOIC
OUT
30
S
L
/4 for R
40
L
referenced to −V
50
V
OUT
R
S
L
60
D
) times the quiescent
to midsupply.
) is the sum of the
L
70
2
80
L
90
is referenced
100
S
AD8000
, worst case
110
120
JA
.

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