ADA4637-1 Analog Devices, ADA4637-1 Datasheet - Page 2

• Manufacturer Part Number: ADA4637-1
• Description: 36 V, 80 MHz, Low Noise, Low Bias Current, JFET Op Amp
• Manufacturer: Analog Devices

ADA4627-1/ADA4637-1
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 14
REVISION HISTORY
10/10—Rev. C to Rev. D
Changes to Figure 1 and General Description.............................. 1
Changes to Ordering Guide .......................................................... 18
7/10—Rev. B to Rev. C
Added ADA4637-1 ............................................................. Universal
Added Figure 2; Renumbered Sequentially .................................. 1
Changes to Table 2 ............................................................................ 3
Change to Table 3 ............................................................................. 5
Changes to Typical Performance Characteristics Section ........... 6
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 18
Electrical Characteristics—30 V Operation ............................. 3
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Rev. D | Page 2 of 20
Outline Dimensions ....................................................................... 17
10/09—Rev. A to Rev. B
Changes to Figure 2 ........................................................................... 1
9/09—Rev. 0 to Rev. A
Changes to General Description Section ....................................... 1
Changes to Table 2 ............................................................................. 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
7/09—Revision 0: Initial Version
Input Voltage Range ................................................................... 14
Input Offset Voltage Adjust Range........................................... 14
Input Bias Current ...................................................................... 14
Noise Considerations ................................................................. 14
THD + N Measurements ........................................................... 15
Printed Circuit Board Layout, Bias Current, and Bypassing 15
Output Phase Reversal ............................................................... 15
Decompensated Op Amps ........................................................ 16
Driving Capacitive Loads .......................................................... 16
Ordering Guide .......................................................................... 18