AD7528 Analog Devices, AD7528 Datasheet - Page 7

• Manufacturer Part Number: AD7528
• Description: CMOS Dual 8-Bit Buffered Multiplying DAC
• Manufacturer: Analog Devices

Specifications of AD7528

• Resolution (bits): 8bit
• Dac Update Rate: 5.6MSPS
• Dac Settling Time: 180ns
• Max Pos Supply (v): +15V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

REV. B
MICROPROCESSOR INTERFACE
PROGRAMMABLE WINDOW COMPARATOR
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE STATE VARIABLE FILTER
In this state variable or universal filter configuration (Figure 14)
DACs A1 and B1 control the gain and Q of the filter character-
istic while DACs A2 and B2 control the cutoff frequency, f
DACs A2 and B2 must track accurately for the simple expres-
sion for f
Op amps are 2
amp gain bandwidth limitations.
TEST INPUT
0 TO –V
DAC A/DAC B
Figure 11. AD7528 Dual DAC to 6800 CPU Interface
A0–A15
INPUTS
V
CPU
6800
+V
D0–D7
IN
DATA
REF
V
REF
V
DD
MA
C
WR
2
CS
to hold. This is readily accomplished by the AD7528.
**A = DECODED 7528 ADDR DAC A
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
AD7528
A + 1 = DECODED 7528 ADDR DAC B
DB0–DB7
V
V
DAC A1
DATA 1
REF
REF
ADDRESS
R
DECODE
S
LOGIC
AD644. C3 compensates for the effects of op
A
B
DB0
DB7
R
Figure 14. Digitally Controlled State Variable Filter
CS WR
FB
AD7528
A + 1**
A**
A
DAC A
DAC B
A1
DAC B1
R
ADDRESS BUS
R
DAC A/DAC B
F
FB
V
DATA BUS
DD
10k
B
R3
OUT A
OUT B
V
COMPARATOR
COMPARATOR
30k
A2
DD
R4
3
2
2
3
DB0
DB7
DAC A/DAC B
CS
WR
AD311
AD311
AD7528*
DB0–DB7
DAC A2
HIGH
PASS
OUTPUT
DAC A
DAC B
7
7
30k
DATA 2
47pF
R5
C3
R1
1k
V
CC
PASS/ FAIL
OUTPUT
1000pF
AD7528
CS WR
C
C1
A3
.
–7–
DAC A/DAC B
DAC B2
BAND
PASS
OUTPUT
The filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor
control of filter parameters is required, e.g., equalizer, tone
controls, etc.
Programmable range for component values shown is f
to 15 kHz and Q = 0.3 to 4.5.
In the circuit of Figure 13 the AD7528 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed
limits, the pass/fail output will indicate a fail (logic zero).
R2
AD0–AD7
Figure 12. AD7528 Dual DAC to 8085 CPU Interface
A8–A15
CPU
8085
ALE
WR
1000pF
C2
A4
**A = DECODED 7528 ADDR DAC A
NOTE:
8085 INSTRUCTION SHLD (STORE H & L DIRECT) CAN UPDATE
BOTH DACs WITH DATA FROM H AND L REGISTERS
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
A + 1 = DECODED 7528 ADDR DAC B
ADDRESS
DECODE
LATCH
LOGIC
8212
LOW
PASS
OUTPUT
A + 1**
A**
ADDR/DATA BUS
ADDRESS BUS
CIRCUIT EQUATIONS
NOTE
DAC Equivalent Resistance
Equals
C
Q
A
f
256 (
C
1
O
R
R
2
C R
–
DAC Digital Code
3
4
DAC Ladder
2 1
R
DB0
DB7
R
CS
WR
DAC A/DAC B
,
R C
1
F
S
R
1 1
R
FBB
AD7528*
F
DAC A
DAC B
AD7528
R R
1
2
R e tan
,
sis
C
4
= 0 kHz
ce
R
)
5