AD7628 Analog Devices, AD7628 Datasheet - Page 7
AD7628
Manufacturer Part Number
AD7628
Description
CMOS Dual 8-Bit Buffered Multiplying DAC
Manufacturer
Analog Devices
Datasheet
1.AD7628.pdf
(8 pages)
Specifications of AD7628
Resolution (bits)
8bit
Dac Update Rate
2.9MSPS
Dac Settling Time
350ns
Max Pos Supply (v)
+15.75V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par
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MICROPROCESSOR INTERFACE
PROGRAMMABLE WINDOW COMPARATOR
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE STATE VARIABLE FILTER
REV. A
In this state, variable or universal filter configuration (Figure
14) for DACs A1 and B1 control the gain and Q of the filter
characteristic, while DACs A2 and B2 control the cutoff fre-
quency, f
expression for f
AD7628. Op amps are 2
effects of op amp gain-bandwidth limitations.
Figure 11. AD7628 Dual DAC to 6800 CPU Interface
C
. DACs A2 and B2 must track accurately for the simple
C
to hold. This is readily accomplished by the
Figure 14. Digitally Controlled State Variable Filter
AD644. C3 compensates for the
–7–
In the circuit of Figure 13, the AD7628 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed lim-
its, the pass/fail output will indicate a fail (logic zero).
The filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor con-
trol of filter parameters is required, e.g., equalizer, tone con-
trols, etc.
Programmable range for component values shown is f
to 15 kHz and Q = 0.3 to 4.5.
Figure 12. AD7628 Dual DAC to 8085 CPU Interface
CIRCUIT EQUATIONS
C
f
Q =
A
NOTE
DAC equivalent resistance equals
C
256
O
1
=
= C
= –
2 R
R
R
DAC Digital Code
3
4
2
DAC Ladder resistance
, R
. R
R
1
R
1
R
F
S
C
FBB1
1
1
F
= R
AD7628
2
, R
C
4
= 0 kHz
= R
5