AD660 Analog Devices, AD660 Datasheet - Page 13

• Manufacturer Part Number: AD660
• Description: Monolithic 16-Bit Serial/Byte DACPORT
• Manufacturer: Analog Devices

Specifications of AD660

• Resolution (bits): 16bit
• Dac Update Rate: 167kSPS
• Dac Settling Time: 6µs
• Max Pos Supply (v): +16.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Byte,Ser

OUTPUT SETTLING AND GLITCH
The AD660 output buffer amplifier typically settles to within
0.0008% FS (1/2 LSB) of its final value in 8 μs for a full-scale
step. Figure 14 and Figure 15 show settling for a full-scale and
an LSB step, respectively, with a 2 kΩ, 1000 pF load applied.
The guaranteed maximum settling time at 25°C for a full-scale
step is 13 μs with this load. The typical settling time for a 1 LSB
step is 2.5 μs.
The digital-to-analog glitch impulse is specified as 15 nV-s
typical. Figure 16 shows the typical glitch impulse characteristic
at the 011…111 to 100…000 code transition when loading the
second rank register from the first rank register.
+10
–10
0
0
Figure 14. −10 V to +10 V Full-Scale Step Settling
R3
5
R
R2
S
9
A2
7
R1
10
A1
R5
TIME (µs)
8
6
10
R4
12
R6
4
11
3
13
Figure 13. Using the AD660 with the AD688 High Precision ±10 V Reference
AD688
A3
A4
14
15
16
1
2
+V
–V
S
S
20
LDAC
50Ω
HBE
SER
CLR
R1
600
400
200
0
–200
–400
–600
CLEAR SELECT
16
17
18
19
23
REF IN
LBE/
Rev. B | Page 13 of 20
15
CONTROL
LOGIC
10kΩ
REF OUT
50Ω
10V REF
R2
24
CS
14
DB0/
DB8/
SIN
12
–V
16-BIT LATCH
16-BIT LATCH
1
EE
16-BIT DAC
DB1/DB9/
DATADIR
11
+10
–10
–200
–400
–600
600
400
200
0
+V
0
0
0
2
DB15
CC
DB7/
5
+V
10.05kΩ
AD660
3
Figure 16. Output Characteristics
LL
10kΩ
1
1
Figure 15. LSB Step Settling
DGND
4
13
22
21
20
2
2
V
S
SPAN/
BIPOLAR
OFFSET
AGND
TIME (µs)
OUT
OUT
TIME (µs)
3
3
10kΩ
R2
100Ω
R3
R4
10kΩ
OUTPUT
0V TO 10V
4
4
AD660
5
5