AD5320 Analog Devices, AD5320 Datasheet - Page 11

• Manufacturer Part Number: AD5320
• Manufacturer: Analog Devices

Specifications of AD5320

• Resolution (bits): 12bit
• Dac Update Rate: 125kSPS
• Dac Settling Time: 8µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

THEORY OF OPERATION
D/A SECTION
The AD5320 DAC is fabricated on a CMOS process. The
architecture consists of a string DAC followed by an output
buffer amplifier. Because there is no reference input pin, the
power supply (V
block diagram of the DAC architecture.
Since the input coding to the DAC is straight binary, the ideal
output voltage is given by:
where D = decimal equivalent of the binary code that is loaded
to the DAC register; it can range from 0 to 4095.
DAC REGISTER
V
OUT
=
V
DD
DD
×
) acts as the reference. Figure 23 shows a
⎛
⎜
⎝
Figure 23. DAC Architecture
4096
D
⎞
⎟
⎠
RESISTOR
STRING
REF (+)
REF (–)
GND
V
DD
OUTPUT
AMPLIFIER
V
OUT
Rev. C | Page 11 of 20
RESISTOR STRING
The resistor string section is shown in Figure 24. It is simply a
string of resistors, each of value R. The code loaded to the DAC
register determines at which node on the string the voltage is
tapped off to be fed into the output amplifier. The voltage is
tapped off by closing one of the switches connecting the string
to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating rail-to-rail
voltages on its output that gives an output range of 0 V to V
is capable of driving a load of 2 kΩ in parallel with 1000 pF to
GND. The source and sink capabilities of the output amplifier
can be seen in Figure 11 and Figure 12. The slew rate is 1 V/μs
with a half-scale settling time of 8 μs with the output unloaded.
R
R
R
R
R
Figure 24. Resistor String
TO OUTPUT
AMPLIFIER
AD5320
DD
. It