AD5328 Analog Devices, AD5328 Datasheet - Page 22

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AD5328

Manufacturer Part Number
AD5328
Description
2.5 V to 5.5 V Octal Voltage Output 12-Bit DACs in 16-Lead TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD5328

Resolution (bits)
12bit
Dac Update Rate
167kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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AD5308/AD5318/AD5328
DECODING MULTIPLE AD5308/AD5318/AD5328s
The SYNC pin on the AD5308/AD5318/AD5328 can be used in
applications to decode a number of DACs. In this application,
the DACs in the system receive the same serial clock and serial
data but only the SYNC to one of the devices is active at any one
time, allowing access to four channels in this 16-channel sys-
tem. The 74HC139 is used as a 2-to-4 line decoder to address
any of the DACs in the system. To prevent timing errors from
occurring, the enable input should be brought to its inactive
state while the coded-address inputs are changing state.
Figure 43
multiple AD5308 devices in a system.
POWER
Figure 42. AD5308/AD5318/AD5328 in an Opto-Isolated Interface
SYNC
SCLK
DIN
shows a diagram of a typical setup for decoding
10kΩ
10kΩ
10kΩ
V
V
V
REGULATOR
DD
DD
DD
5V
SCLK
AD5308/AD5318/
SYNC
DIN
AD5328
GND
V
V
V
DD
REF
REF
ABCD
EFGH
V
V
V
V
V
V
V
V
10μF
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
C
D
E
F
G
H
0.1μF
Rev. F | Page 22 of 28
ADDRESS
ENABLE
CODED
SCLK
DIN
Figure 43. Decoding Multiple AD5308 Devices in a System
1G
1A
1B
74HC139
DGND
V
V
CC
DD
1Y0
1Y1
1Y2
1Y3
SYNC
DIN
SCLK
SYNC
DIN
SCLK
SYNC
DIN
SCLK
SYNC
DIN
SCLK
AD5308
AD5308
AD5308
AD5308
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
G
H
A
B
G
H
A
B
G
H
A
B
G
H

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