AD9705 Analog Devices, AD9705 Datasheet - Page 29

• Manufacturer Part Number: AD9705
• Manufacturer: Analog Devices

Specifications of AD9705

• Resolution (bits): 10bit
• Dac Update Rate: 175MSPS
• Dac Settling Time: 11ns
• Max Pos Supply (v): +3.6V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

Data Sheet
TERMINOLOGY
Linearity Error (Integral Nonlinearity or INL)
INL is defined as the maximum deviation of the actual analog
output from the ideal output, determined by a straight line
drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A digital-to-analog converter is monotonic if the output either
increases or remains constant as the digital input increases.
Offset Error
Offset error is the deviation of the output current from the ideal of
zero. For IOUTA, 0 mA output is expected when the inputs are all
0s. For IOUTB, 0 mA output is expected when all inputs are set to 1.
Gain Error
Gain error is the difference between the actual and ideal output
span. The actual span is determined by the output when all inputs
are set to 1, minus the output when all inputs are set to 0. The
ideal gain is calculated using the measured VREF. Therefore,
the gain error does not include effects of the reference.
Output Compliance Range
Output compliance range is the range of allowable voltage at the
output of a current output DAC. Operation beyond the maximum
compliance limits can cause either output stage saturation or
breakdown, resulting in nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25°C) value to the value at either T
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per °C. For reference drift, the drift is reported in
ppm per °C.
50Ω
JTX-4-10T+
16kΩ
R
LOW JITTER
SET
RF SOURCE
1.7V TO 3.6V
1.7V TO 3.6V
AD9512
CLK1
CLKB
0.1µF
MIN
OUTPUT
CLOCK
or T
REFIO
FS ADJ
CLKVDD
CLKCOM
CLK+
CLK–
DVDD
DCOM
Figure 70. Basic AC Characterization Test Setup
1.0V REF
MAX
. For
SEGMENTED
SWITCHES
Rev. B | Page 29 of 44
DIGITAL DATA
SOURCE DPG
LATCHES
DIGITAL
DATA
AVDD
1.7V TO 3.6V
CURRENT
SOURCE
ARRAY
SWITCHES
Power Supply Rejection
Power supply rejection is the maximum change in the full-scale
output as the supplies are varied from nominal to minimum
and maximum specified voltages.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in picovolt-seconds (pV-s).
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in decibels (dB), between the rms
amplitude of the output signal and the peak spurious signal
over the specified bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal.
It is expressed as a percentage or in decibels (dB).
Multitone Power Ratio
Multitone power ratio is the spurious-free dynamic range
containing multiple carrier tones of equal amplitude. It is
measured as the difference between the rms amplitude of
a carrier tone to the peak spurious signal in the region of
a removed tone.
Noise Spectral Density (NSD)
Noise spectral density is the average noise power normalized to
a 1 Hz bandwidth, with the DAC converting and producing an
output tone.
LSB
ACOM
SLEEP/CSB
AD9707
AD9704/AD9705/AD9706/AD9707
SPI
IOUTA
IOUTB
OTCM
1kΩ
ADT4-6T+