AD5664 Analog Devices, AD5664 Datasheet - Page 17

• Manufacturer Part Number: AD5664
• Manufacturer: Analog Devices

Specifications of AD5664

• Resolution (bits): 16bit
• Dac Update Rate: 223kSPS
• Dac Settling Time: 4µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

SOFTWARE RESET
The AD5624/AD5664 contain a software reset function.
Command 110 is reserved for the software reset function (see
Table 7). The software reset command contains two reset modes
that are software programmable by setting Bit DB0 in the
control register. Table 9 shows how the state of the bit
corresponds to the software reset modes of operation of the
devices.
Table 9. Software Reset Modes for the AD5624/AD5664
DB0
0
1 (Power-On Reset)
POWER-DOWN MODES
The AD5624/AD5664 contain four separate modes of operation.
Command 100 is reserved for the power-down function (see
Table 7). These modes are software programmable by setting two
bits (DB5 and DB4) in the control register. Table 10 shows how
the state of the bits corresponds to the mode of operation of the
device. All DACs (DAC D to DAC A) can be powered down to
the selected mode by setting the corresponding four bits (DB3,
DB2, DB1, and DB0) to 1. By executing the same Command 100,
any combination of DACs is powered up by setting Bit DB5 and
Bit DB4 to normal operation mode. To select which combination
of DAC channels to power-up, set the corresponding four bits
(DB3, DB2, DB1, and DB0) to 1. See Table 11 for contents of the
input shift register during the power-down/power-up operation.
Table 11. 24-Bit Input Shift Register Contents of Power-Down/Power-Up Operation
DB23 to
DB22 (MSB)
x
Don’t care
DB21
1
Command bits (C2 to C0)
DB20
0
Registers Reset to Zero
DAC register
Input shift register
DAC register
Input shift register
LDAC register
Power-down register
DB19
0
DB18
x
Address bits (A2 to A0); don’t
care
DB17
x
Rev. 0 | Page 17 of 24
DB16
x
Table 10. Modes of Operation for the AD5624/AD5664
DB5
0
0
1
1
When both bits are set to 0, the parts work normally with their
normal power consumption of 450 μA at 5 V. However, for the
three power-down modes, the supply current falls to 480 nA at
5 V (200 nA at 3 V). Not only does the supply current fall, but
the output stage is also internally switched from the output of
the amplifier to a resistor network of known values. This allows
the output impedance of the part to be known while the part is
in power-down mode.
The outputs can either be connected internally to GND through
a 1 kΩ or 100 kΩ resistor, or left open-circuited (three-state)
(see Figure 34).
The bias generator, the output amplifier, the resistor string, and
other associated linear circuitry are shut down when power-
down mode is activated. However, the contents of the DAC
register are unaffected when in power-down. The time to exit
power-down is typically 4 μs for V
(see Figure 21).
DB15
to DB6
x
Don’t
care
STRING DAC
RESISTOR
DB4
0
1
0
1
Figure 34. Output Stage During Power-Down
DB5
Power-
down mode
PD1
DB4
PD0
POWER-DOWN
AMPLIFIER
CIRCUITRY
Operating Mode
Normal operation
Power-down modes
1 kΩ to GND
100 kΩ to GND
Three-state
DB3
DAC D
Power-down/power-up channel
selection, set bit to 1 to select
channel
DD
= 5 V and for V
AD5624/AD5664
DB2
DAC C
NETWORK
RESISTOR
DB1
DAC B
V
OUT
DD
= 3 V
DB0
(LSB)
DAC A