CS3318-CQZ Cirrus Logic Inc, CS3318-CQZ Datasheet - Page 36

• Manufacturer Part Number: CS3318-CQZ
• Description: IC ANLG VOL CTRL 8CH DGTL 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audio Volume Controlr

Specifications of CS3318-CQZ

• Package / Case: 48-LQFP
• Applications: High End Audio
• Mounting Type: Surface Mount
• Product: General Purpose Audio Amplifiers
• Output Power: 650 mW
• Available Set Gain: 22 dB
• Thd Plus Noise: - 112 dB
• Operating Supply Voltage: +/- 8 V to +/- 9 V, 3.3 V
• Supply Current: 36 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio Load Resistance: 2 KOhms
• Input Offset Voltage: 0.75 V
• Input Signal Type: Single
• Minimum Operating Temperature: - 10 C
• Output Signal Type: Analog
• Supply Voltage (max): 9.45 V
• Supply Voltage (min): 3.1 V
• Output Type: 8-Channel Audio
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1497 - BOARD EVAL FOR CS3318 VOL CTRL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1180

36
7.8
7.8.1
7.9
7.10
7.10.1 Master 1 Volume Control (Bits 7:0)
M1_Ch8M
Reserved
M1_Vol7
7
7
7
Freeze Control - Address 0Fh
Master 1 Mask - Address 10h
Each bit in this register serves as a Master 1 mask for its corresponding channel.
If a mask bit is set to ‘1’, the corresponding channel is unmasked, meaning that it will be affected by the
Master 1 volume and muting controls.
If a mask bit is set to ‘0’, the corresponding channel is masked, meaning that it will not be affected by the
Master 1 volume and muting controls.
This register defaults to FFh (all channels unmasked).
Master 1 Volume - Address 11h
Freeze (Bit 7)
Default = 0
Function:
Default = 11010010
Function:
When the Freeze bit is set, the Freeze function allows modifications to the control port registers with-
out changes taking effect until Freeze bit is cleared. To make multiple changes in the Control Port
registers take effect simultaneously, set the Freeze bit, make all register changes, then clear the
Freeze bit.
The Master 1 volume control register allows the user to simultaneously gain or attenuate all un-
masked channels in 0.5 dB increments. The volume changes are implemented as dictated by the ZC-
Mode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see
Address 0Ch” on page
The value of the Master 1 volume control register is mapped to the desired 0.5 dB step Master 1 vol-
ume setting by the following equation:
In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB
resolution volume setting down to ½ dB resolution.
It should be noted that input values outside the CS3318’s analog range of +22 dB to -96 dB are valid,
however, the volume of each channel will be limited to the CS3318’s analog range (see
its” on page
See
M1_Ch7M
Reserved
M1_Vol6
Table 5 on page 31
6
6
6
20).
M1_Ch6M
Reserved
M1_Vol5
Register Value
5
5
5
34).
for example register settings.
M1_Ch5M
Reserved
M1_Vol4
4
4
4
=
(
2
×
Desired Volume Setting in dB
M1_Ch4M
Reserved
M1_Vol3
3
3
3
M1_Ch3M
Reserved
M1_Vol2
2
2
2
)
“Device Configuration 2 -
+
M1_Ch2M
Reserved
M1_Vol1
210
1
1
1
“Volume Lim-
M1_Ch1M
CS3318
M1_Vol0
Freeze
DS693F1
0
0
0