CS8415A-CZZ Cirrus Logic Inc, CS8415A-CZZ Datasheet - Page 35

IC 96KHZ DGTL RCVR 28-TSSOP

CS8415A-CZZ

Manufacturer Part Number
CS8415A-CZZ
Description
IC 96KHZ DGTL RCVR 28-TSSOP
Manufacturer
Cirrus Logic Inc
Type
Digital Audio Interface Receiverr
Datasheet

Specifications of CS8415A-CZZ

Applications
Automotive Audio
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Audio Control Type
Digital
Control Interface
I2C, Serial
Control / Process Application
AV & DVD Receivers, CD-R, Digital Mixing Consoles
Supply Voltage Range
2.85V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1122-5

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DS470F4
12. APPLICATIONS
12.1
12.2
12.3
Reset, Power Down and Start-Up
When RST is low, the CS8415A enters a low-power mode and all internal states are reset, including the
control port and registers, and the outputs are muted. When RST is high, the control port becomes opera-
tional and the desired settings should be loaded into the control registers. Writing a 1 to the RUN bit will then
cause the part to leave the low-power state and begin operation. After the PLL has settled, the serial audio
outputs will be enabled.
Some options within the CS8415A are controlled by a start-up mechanism. During the reset state, some of
the output pins are reconfigured internally to be inputs. Immediately upon exiting the reset state, the level
of these pins is sensed. The pins are then switched to be outputs. This mechanism allows output pins to be
used to set alternative modes in the CS8415A by connecting a 47 kΩ resistor to between the pin and either
VL+ (HI) or DGND (LO). For each mode, every start-up option select pin MUST have an external pull-up or
pull-down resistor. In software mode, the only start-up option pin is EMPH, which is used to set a chip ad-
dress bit for the control port in I²C mode. The hardware mode uses many start-up options, which are detailed
in the hardware definition section at the end of this data sheet.
ID Code and Revision Code
The CS8415A has a register that contains a 4-bit code to indicate that the addressed device is a CS8415A.
This is useful when other CS84xx family members are resident in the same system, allowing common soft-
ware modules.
The CS8415A 4-bit revision code is also available. This allows the software driver for the CS8415A to iden-
tify which revision of the device is in a particular system, and modify its behavior accordingly. To allow for
future revisions, it is strongly recommend that the revision code is read into a variable area within the mi-
crocontroller, and used wherever appropriate as revision details become known.
Power Supply, Grounding, and PCB Layout
For most applications, the CS8415A can be operated from a single +5.0 V supply, following normal supply
decoupling practices. See
applications where the recovered input clock, output on the RMCK pin, is required to be low-jitter, then use
a separate, quiet, analog +5.0 V supply for VA+, decoupled to AGND. In addition, a separate region of an-
alog ground plane around the FILT, AGND, VA+, RXP[0:6] and RXN0 pins is recommended.
Extensive use of power and ground planes, ground plane fill in unused areas and surface mount decoupling
capacitors are recommended. Decoupling capacitors should be mounted on the same side of the board as
the CS8415A to minimize inductance effects, and all decoupling capacitors should be as close to the
CS8415A as possible.
Figure
5. Note that the I²C protocol is supported only in VL+ = 5.0 V mode. For
CS8415A
35

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