AD5762R Analog Devices, AD5762R Datasheet - Page 26
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AD5762R
Manufacturer Part Number
AD5762R
Description
Complete Dual, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
Manufacturer
Analog Devices
Datasheet
1.AD5762R.pdf
(32 pages)
Specifications of AD5762R
Resolution (bits)
16bit
Dac Update Rate
84.6kSPS
Dac Settling Time
8µs
Max Pos Supply (v)
+16.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Ser,SPI
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AD5762R
OFFSET REGISTER
The offset register is addressed by setting the three REG bits to 101. The DAC address bits select the DAC channel with which the data
transfer is to take place (see Table 10). The AD5762R offset register is an 8-bit register and allows the user to adjust the offset of each channel
by −16 LSBs to +15.875 LSBs in steps of ⅛ LSB, as shown in Table 18 and Table 19. The offset register coding is twos complement.
Table 18. Programming the Offset Register
REG2
1
Table 19. Offset Register Options
Offset Adjustment
+15.875 LSBs
+15.75 LSBs
No Adjustment (Default)
−15.875 LSBs
−16 LSBs
OFFSET AND GAIN ADJUSTMENT WORKED
EXAMPLE
Using the information provided in the previous section, the
following worked example demonstrates how the AD5762R
functions can be used to eliminate both offset and gain errors.
As the AD5762R is factory calibrated, offset and gain errors
should be negligible. However, errors can be introduced by the
system that the AD5762R is operating within, for example, a
voltage reference value that is not equal to +5 V introduces a
gain error. An output range of ±10 V and twos complement
data coding is assumed.
Removing Offset Error
The AD5762R can eliminate an offset error in the range of
−4.88 mV to +4.84 mV with a step size of ⅛ of a 16-bit LSB.
1.
2.
3.
The offset error measured is positive; therefore, a negative
adjustment of 16 steps is required. The offset register is 8 bits
wide, and the coding is twos complement.
Offset Adjust Step Size =
Number Steps =
Calculate the step size of the offset adjustment
Measure the offset error by programming 0x0000 to the
data register and measuring the resulting output voltage.
For this example, the measured value is +614 μV.
Determine the number of offset adjustment steps this
value represents, using the following equation:
REG1
0
REG0
1
Measured
Offset
2
Step
A2
Offset
16
20
DAC address
×
Size
8
Value
= 38.14 μV
A1
OF7
0
0
0
1
1
=
A0
38
614
.
14
μV
μV
DB15:DB8
Don’t care
OF6
1
1
0
0
0
= 16 Steps
Rev. C | Page 26 of 32
OF5
1
1
0
0
0
DB7
OF7
The required offset register value can be calculated as follows:
1.
2.
3.
Note that this twos complement conversion is not necessary in
the case of a positive offset adjustment. The value to be
programmed to the offset register is simply the binary
representation of the adjustment value.
Removing Gain Error
The AD5762R can eliminate a gain error at negative full-scale
output in the range of −9.77 mV to +9.46 mV with a step size of
½ of a 16-bit LSB.
1.
2.
3.
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of eight steps is required. The
gain register is 6 bits wide, and the coding is twos complement.
The required gain register value can be determined as follows:
1.
2.
Number of Steps =
Gain Adjust Step Size =
Convert adjustment value to binary: 00010000.
Convert this to a negative twos complement number by
inverting all bits and adding 1: 11110000.
Program 11110000 to the offset register.
Calculate the step size of the gain adjustment using the
following equation:
Measure the gain error by programming 0x8000 to the
data register and measuring the resulting output voltage.
The gain error is the difference between this value and
−10 V. For this example, the gain error is −1.2 mV.
Determine how many gain adjustment steps this value
represents by using the following equation:
Convert the adjustment value to binary: 001000.
001000 is the value to be programmed to the gain register.
DB6
OF6
OF4
1
1
0
0
0
DB5
OF5
OF3
1
1
0
0
0
Measured
DB4
OF4
Gain
2
16
Step
20
OF2
1
1
0
0
0
Gain
×
DB3
OF3
2
Size
= 152.59 μV
Value
DB2
OF2
=
OF1
1
1
0
0
0
152
1
Data Sheet
2 .
.
59
mV
DB1
OF1
μV
= 8 Steps
OF0
1
0
0
1
0
DB0
OF0