AD5541A Analog Devices, AD5541A Datasheet - Page 5

• Manufacturer Part Number: AD5541A
• Manufacturer: Analog Devices

Specifications of AD5541A

• Resolution (bits): 16bit
• Dac Update Rate: 1MSPS
• Dac Settling Time: 1µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Unbuffered Vout
• Dac Input Format: Ser,SPI

TIMING CHARACTERISTICS
V
noted.
Table 4.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
SCLK
1
2
3
4
5
6
7
8
9
9
10
11
12
Guaranteed by design and characterization. Not production tested.
All input signals are specified with t
DD
= 5 V, 2.5 V ≤ V
1,2
SCLK
LDAC
DIN
CS
Limit at
1.8 ≤ V
14
70
35
35
5
5
5
10
35
5
5
20
10
15
REF
≤ V
LOGIC
DD
t
12
, V
≤ 2.7 V
R
t
= t
6
INH
F
= 1 ns/V and timed from a voltage level of (V
t
DB15
t
4
= 90% of V
8
t
9
Limit at
2.7 V ≤ V
50
20
10
10
5
5
5
5
10
4
5
20
10
15
LOGIC
LOGIC
, V
INL
t
2
≤ 5.5 V
= 10% of V
Figure 3. Timing Diagram
Rev. A | Page 5 of 20
t
1
t
3
Unit
MHz max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
LOGIC
INL
, AGND = DGND = 0 V, −40°C < T
+ V
INH
)/2.
t
7
t
Description
SCLK cycle frequency
SCLK cycle time
SCLK high time
SCLK low time
CS low to SCLK high setup
CS high to SCLK high setup
SCLK high to CS low hold time
SCLK high to CS high hold time
Data setup time
Data hold time (V
Data hold time (V
LDAC pulse width
CS high to LDAC low setup
CS high time between active periods
5
t
11
t
10
INH
INH
= 90% of V
= 3 V, V
A
INL
< +105°C, unless otherwise
= 0 V)
DD
, V
INL
= 10% of V
AD5541A
DD
)