AD7890 Analog Devices, AD7890 Datasheet
AD7890
Specifications of AD7890
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AD7890 Summary of contents
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... ADC, a 2.5 V reference, and a high speed, serial interface. The part operates from a single 5 V supply and accepts an analog input range of ±10 V (AD7890-10 4.096 V (AD7890-4), and 2.5 V (AD7890-2). The multiplexer on the part is independently accessible. This allows the user to insert an antialiasing filter or signal conditioning, if required, between the multiplexer and the ADC ...
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... A to Rev. B Serial Interface ................................................................................ 17 Self-Clocking Mode ................................................................... 17 External Clocking Mode ........................................................... 18 Simplifying the Interface ........................................................... 19 Microprocessor/Microcontroller Interface ................................. 20 AD7890 to 8051 Interface ......................................................... 20 AD7890 to 68HC11 Interface ................................................... 20 AD7890 to ADSP-2101 Interface ............................................. 21 AD7890 to DSP56000 Interface ............................................... 21 AD7890 to TMS320C25/30 Interface...................................... 21 Antialiasing Filter....................................................................... 22 Performance .................................................................................... 23 Linearity....................................................................................... 23 Noise ............................................................................................ 23 Dynamic Performance............................................................... 24 Effective Number of Bits ........................................................... 24 Outline Dimensions ....................................................................... 25 Ordering Guide ...
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... Missing Codes Are Guaranteed 2 Relative Accuracy ±1 2 ±1 Differential Nonlinearity 2 Positive Full-Scale Error ±2.5 4 Full-Scale Error Match 2 AD7890-2, AD7890-4 2 ±2 Unipolar Offset Error Unipolar Offset Error Match 2 AD7890-10 Only 2 ±2 Negative Full-Scale Error 2 Bipolar Zero Error ±5 Bipolar Zero Error Match ...
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... See the Terminology section. 3 This sample rate is only achievable when using the part in external clocking mode. 4 Full-scale error match applies to positive full scale for the AD7890-2 and AD7890-4. It applies to both positive and negative full scale for the AD7890-10. 5 Sample tested @ 25°C to ensure compliance. 6 Analog inputs on AD7890-10 must achieve correct power-down current ...
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... Sample tested at −25°C to ensure compliance. All input signals are specified with (10 and timed from a voltage level of 1 See Figure 10 to Figure 13. 3 The AD7890 is production tested with f at 2.5 MHz guaranteed by characterization to operate at 100 kHz. CLK IN 4 Specified using 10% and 90% points on waveform of interest ...
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... A Parameter V to AGND DGND DD Analog Input Voltage to AGND AD7890-10, AD7890-4 AD7890-2 Reference Input Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND Operating Temperature Range Commercial (A, B Versions) Extended (S Version) Storage Temperature Range Junction Temperature PDIP Package, Power Dissipation θ ...
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... Serial data is valid on the falling edge of SCLK for sixteen edges after RFS goes low. Output coding from the ADC is twos complement for the AD7890-10 and straight binary for the AD7890-4 and AD7890-2. ...
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... V Analog Input Channel 5. Single-ended analog input. The analog input range on is ±10 V (AD7890-10 IN5 4.096 V (AD7890-4), and 2.5 V (AD7890-2). The channel to be converted is selected using the A0, A1, and A2 bits in the control register. The multiplexer has guaranteed break-before-make operation Analog Input Channel 6. Single-ended analog input. The analog input range on is ± ...
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... The AD7890 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second and third order terms are of different significance ...
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... AD7890 CONTROL REGISTER The control register for the AD7890 contains 5 bits of information. Six serial clock pulses must be provided to the part in order to write data to the control register (seven if the write is required to put the part in standby mode). If TFS returns high before six serial clock cycles, then no data transfer takes place to the control register and the write cycle has to be restarted to write the data to the control register ...
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... CIRCUIT DESCRIPTION The AD7890 is offered as three part types: the AD7890-10 handles a ±10 V input voltage range, the AD7890-4 handles 4.096 V input range, while the AD7890-2 handles 2.5 V input voltage range. AD7890-10 Analog Input Figure 4 shows the analog input section for the AD7890-10. The analog input range for each of the analog inputs is ± ...
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... LSB = FSR/4096 = 0.61 mV with REF IN = 2.5 V. TRACK/HOLD AMPLIFIER The SHA IN input on the AD7890 connects directly to the input stage of the track/hold amplifier. This is a high impedance input with input leakage currents of less than 50 nA. Connecting the MUX OUT pin directly to the SHA IN pin connects the multiplexer output directly to the track/hold amplifier ...
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... If the application requires a reference with a tighter tolerance or the AD7890 needs to be used with a system reference, then the user has the option of connecting an external reference to this REF OUT/REF IN pin. The external reference effectively overdrives the internal reference and thus provides the reference source for the ADC ...
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... In the sequence shown, conversion is initiated on the rising edge of CONVST and new data is available in the output register of the AD7890 5.9 μs later. Once the read operation has taken place, a further 500 ns should be allowed CONVST ...
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... However, applications that seek to achieve optimum performance from the AD7890 has to ensure that the data read does not occur during conversion or during 500 ns prior to the rising edge of CONVST . ...
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... T = –40°C A multiplexer change command and the conversion start command are separated, they need to be separated by greater than the acquisition time of the AD7890 plus the settling time of the external circuitry if the user does not have to worry about the C 1500 1750 2000 ...
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... A serial read to the AD7890 accesses data from the output register via the DATA OUT line. A serial write to the AD7890 writes data to the control register via the DATA IN line. Two different modes of operation are available, optimized for ...
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... Read Operation Figure 12 shows the timing diagram for reading from the AD7890 in the external clocking mode. RFS goes low to access data from the AD7890. The serial clock input does not have to be continuous. The serial data can be accessed in a number of bytes. RFS (I) ...
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... SIMPLIFYING THE INTERFACE To minimize the number of interconnect lines to the AD7890, the user can connect the RFS and TFS lines of the AD7890 together and read and write from the part simultaneously. In this case, new control register data should be provided on the DATA IN line selecting the input channel and possibly ...
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... The serial clock rate from the 8xC51 is limited to significantly less than the allowable input serial clock frequency with which the AD7890 can operate result, the time to read data from the part is actually longer than the conversion time of the part. This means that the AD7890 cannot run at its maximum throughput rate when used with the 8xC51 ...
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... The FSL bit of the DSP56000 should be set to 0. The RFS and TFS inputs of the AD7890 are connected together so data is transmitted to and from the AD7890 at the same time. With the DSP56000 in synchronous mode, it provides a common frame synchronization pulse for read and write operations on its SC2 output ...
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... It is recommended that this filter CLK INPUT is an active filter, ideally with the MUX OUT pin of the AD7890 driving a high impedance stage and the SHA IN pin of the part CLK IN being driven from a low impedance stage ...
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... The histogram plot for 8192 conversions of the same dc input now shows a larger spread of codes than for ideal conditions but smaller than for a read operation. The resulting rms noise for the AD7890-2 is 110 μV. In this case, the serial clock frequency is 10 MHz. Rev Page SAMPLING FREQUENCY = 102 ...
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... Figure 23 shows a typical plot of effective number of bits versus frequency for the AD7890-2 from kHz. The sampling frequency is 102.4 kHz. The plot shows that the AD7890 converts an input sine wave of 40 kHz to an effective numbers of bits of 11 which equates to a signal to (noise + distortion) level ...
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... REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 25. 24-Lead Ceramic Dual In-Line Package [CERDIP] (Q-24) Dimensions shown in inches and (millimeters) Rev Page 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) MAX 0.130 (3.30) 0.115 (2.92) 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 15° 0° AD7890 ...
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... AD7890 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 15.60 (0.6142) 15.20 (0.5984 7.60 (0.2992) 7.40 (0.2913) 1 10.65 (0.4193) 12 10.00 (0.3937) 2.65 (0.1043) 2.35 (0.0925) SEATING 0.51 (0.0201) 1.27 (0.0500) 0.33 (0.0130) PLANE BSC 0.31 (0.0122) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AD CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. ...
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... AD7890BR-4REEL −40°C to +85°C 1 AD7890BRZ-4 −40°C to +85°C 1 AD7890BRZ-4REEL −40°C to +85°C AD7890SQ-4 −55°C to +125°C AD7890AN-10 −40°C to +85°C AD7890ANZ-10 1 −40°C to +85°C AD7890BN-10 −40°C to +85°C 1 AD7890BNZ-10 −40°C to +85°C AD7890AR-10 − ...
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... AD7890 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01357-0-9/06(C) Rev Page ...