AD7851 Analog Devices, AD7851 Datasheet - Page 6
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AD7851
Manufacturer Part Number
AD7851
Description
14-Bit, 333 kSPS, Serial Sampling A/D Converter
Manufacturer
Analog Devices
Datasheet
1.AD7851.pdf
(36 pages)
Specifications of AD7851
Resolution (bits)
14bit
# Chan
1
Sample Rate
333kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(Vref) p-p,Uni (Vref)
Adc Architecture
SAR
Pkg Type
DIP,SOIC,SOP
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TYPICAL TIMING DIAGRAMS
Figures 2 and 3 show typical read and write timing diagrams.
Figure 2 shows the reading and writing after conversion in
Interface Modes 2 and 3. To attain the maximum sample rate of
285 kHz in Interface Modes 2 and 3, reading and writing must
be performed during conversion. Figure 3 shows the timing dia-
gram for Interface Modes 4 and 5 with sample rate of 285 kHz.
At least a 330 ns acquisition time must be allowed (the time
from the falling edge of BUSY to the next rising edge of
CONVST) before the next conversion begins to ensure that the
part is settled to the 14-bit level. If the user does not want to
provide the CONVST signal, the conversion can be initiated in
software by writing to the control register.
AD7851
CONVST (I/P)
BUSY (O/P)
DOUT (O/P)
CONVST (I/P)
SYNC (I/P)
SCLK (I/P)
SYNC ( O/P)
DOUT (O/P)
BUSY (O/P)
SCLK (O/P)
DIN (I/P)
DIN (I/P)
Figure 2. Timing Diagram (Typical Read and Write Operation for Interface Modes 2, 3)
Figure 3. Timing Diagram (Typical Read and Write Operation for Interface Modes 4, 5)
POLARITY PIN LOGIC HIGH
POLARITY PIN LOGIC HIGH
t
2
t
2
THREE-STATE
t
1
t
1
t
5
THREE-STATE
DB15
t
t
7
CONVERT
t
4
DB15
1
t
t
8
5
t
t
CONVERT
5
t
3
= 30ns MAX, t
t
t
DB15
CONVERT
5
t
7
= 30ns MAX, t
DB11
1
t
CONVERT
= 3.25µs MAX, t
t
6
DB15
–6–
= 3.25µs MAX, t
t
DB11
6
5
t
8
7
= 30ns MIN
7
t
= 30ns MIN
9
Figure 1. Load Circuit for Digital Output Timing
Specifications
1
t
= 100ns MIN,
DB11
6
10
1
DB0
= 100ns MIN,
OUTPUT
5
PIN
t
DB11
TO
6
t
9
DB0
16
50pF
t
6
10
t
11
C
L
THREE-STATE
t
DB0
12
16
200µA
1.6mA
DB0
t
11
t
12
I
I
OH
OL
THREE-STATE
2.1V
REV. B