AD7810 Analog Devices, AD7810 Datasheet - Page 7

• Manufacturer Part Number: AD7810
• Description: 2.7 V to 5.5 V, 2 ms, 10-Bit ADC in 8-Lead microSOIC/DIP
• Manufacturer: Analog Devices

Specifications of AD7810

• Resolution (bits): 10bit
• # Chan: 1
• Sample Rate: 350kSPS
• Interface: Ser
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

When using the pseudo differential input scheme, the signal on
V
sion process. If the signal on V
conversion result will be incorrect. For single-ended operation,
V
pseudo differential input being used to make a unipolar dc cur-
rent measurement. A sense resistor is used to convert the current
to a voltage and the voltage, is applied to the differential input
as shown.
DC Acquisition Time
The ADC starts a new acquisition phase at the end of a conver-
sion and ends on the falling edge of the CONVST signal. At the
end of a conversion there is a settling time associated with the
sampling circuit. This settling time lasts approximately 100 ns.
The analog signal on V
settling time; therefore, the minimum acquisition time needed is
approximately 100 ns.
Figure 10 shows the equivalent charging circuit for the sampling
capacitor when the ADC is in its acquisition phase. R2 repre-
sents the source impedance of a buffer amplifier or resistive
network; R1 is an internal multiplexer resistance and C1 is the
sampling capacitor.
During the acquisition phase, the sampling capacitor must be
charged to within a 1/2 LSB of its final value. The time it takes
to charge the sampling capacitor (t
lowing formula:
REV. B
IN–
IN–
is always connected to AGND. Figure 9 shows the AD7810
must not vary by more than a 1/2 LSB during the conver-
Figure 9. DC Current Measurement Scheme
Figure 10. Equivalent Sampling Circuit
V
t
DD
CHARGE
R2
R
SENSE
= 7.6 × (R2 + 125 Ω) × 3.5 pF
R
V
IN+
L
IN
+
is also being acquired during this
IN–
varies during conversion, the
CHARGE
V
V
IN
IN
125
+
–
R1
AD7810
) is given by the fol-
C1
3.5pF
–7–
For small values of source impedance, the settling time associated
with the sampling circuit (100 ns) is, in effect, the acquisition
time of the ADC. For example, with a source impedance (R2)
of 10 Ω, the charge time for the sampling capacitor is approxi-
mately 4 ns. The charge time becomes significant for source
impedances of 2 kΩ and greater.
AC Acquisition Time
In ac applications it is recommended to always buffer analog
input signals. The source impedance of the drive circuitry must
be kept as low as possible to minimize the acquisition time of
the ADC. Large values of source impedance will cause the THD
to degrade at high throughput rates. In addition, better perfor-
mance can generally be achieved by using an external 1 nF
capacitor on V
ADC TRANSFER FUNCTION
The output coding of the AD7810 is straight binary. The
designed code transitions occur at successive integer LSB values
(i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = V
ideal transfer characteristic for the AD7810 is shown in Figure
11 below.
111...111
111...110
000...010
111...000
000...001
000...000
011...111
Figure 11. Transfer Characteristic
IN+
0V
.
1LSB
ANALOG INPUT
1LSB = V
REF
/1024
REF
AD7810
+V
REF
/1024. The
–1LSB