AD7822 Analog Devices, AD7822 Datasheet - Page 11

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AD7822

Manufacturer Part Number
AD7822
Description
3 V/5 V, 2 MSPS, 8-Bit, 1-/4-/8-Channel Sampling ADCs
Manufacturer
Analog Devices
Datasheet

Specifications of AD7822

Resolution (bits)
8bit
# Chan
1
Sample Rate
2MSPS
Interface
Par
Analog Input Type
SE-Uni
Ain Range
2 V p-p,2.5V p-p
Adc Architecture
Pipelined
Pkg Type
DIP,SOIC,SOP

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A suggestion is to tie CONVST to V
or pull-down resistor. A rising edge on the CONVST pin causes
the AD7829 to fully power up, while a rising edge on the PD pin
causes the AD7822 and AD7825 to fully power up. For applica-
tions where power consumption is of concern, the automatic
power-down at the end of a conversion should be used to improve
power performance (see the Power vs. Throughput section).
4.5V TO 5.5V
1
2
3
4
5
ADC TRANSFER FUNCTION
The output coding of the AD7822/AD7825/AD7829 is straight
binary. The designed code transitions occur at successive integer
LSB values (that is, 1 LSB, 2 LSBs, and so on). The LSB size =
V
3 V). The ideal transfer characteristic for the AD7822/AD7825/
AD7829 is shown in Figure 10.
A0, A1
A2
PD
V
V
REF
IN2
IN5
SUPPLY
TO V
/256 (V
3.75V INPUT
TO V
1.25V TO
IN4
IN8
10µF
DD
(V
(V
11111111
00000000
AD7825/AD7829
AD7829
AD7822/AD7825
AD7825/AD7829
AD7829
10000000
111...110
111...000
000...010
000...001
000...111
DD
DD
= 5 V) or the LSB size = (0.8 V
Figure 9. Typical Connection Diagram
= 3V) V
= 5V) V
Figure 10. Transfer Characteristic
MID
MID
V
V
AGND
V
DGND
0.1µF
1LSB
IN1
IN2
IN4
1LSB = V
– 1.25V
– 1V
4
(V
ANALOG INPUT VOLTAGE
(V
V
IN8
DD
DD
5
)
AD7822/
AD7825/
AD7829
= 5V)
REF
V
MID
AD780
/256
1LSB = 0.8V
2.5V
V
DD
V
V
REF
MID
MID
or DGND through a pull-up
DB0 TO DB7
(V
+ 1.25V – 1LSB
+ 1V – 1LSB
DD
CONVST
V
= 3V)
MID
REF
EOC
PD
A0
A1
A2
RD
CS
REF
/256
1
1
2
3
PARALLEL
INTERFACE
)/256 (V
µC/µP
DD
=
Rev. C | Page 11 of 28
ANALOG INPUT
The AD7822 has a single input channel, and the AD7825 and
AD7829 have four and eight input channels, respectively. Each
input channel has an input span of 2.5 V or 2.0 V, depending on
the supply voltage (V
by an on-chip V
is detected when V
detected when V
a degree of glitch rejection; for example, a glitch from 5.5 V to
2.7 V up to 60 ns wide does not trip the V
The V
range of AGND to V
the default input range is AGND to 2.0 V (V
that is, centered about 1.0 V; or AGND to 2.5 V (V
10%), that is, centered about 1.25 V. When using the default
input range, the V
cases, it can be decoupled to AGND with a 0.1 μF capacitor.
If, however, an external V
is from V
from V
The range of values of V
value of V
be applied to V
V
ranges of V
Figure 11 illustrates the input signal range available with various
values of V
Table 5.
V
5.5
5.0
4.5
3.3
3.0
2.7
DD
DD
− 1.25 V when V
MID
V
Internal
1.25
1.25
1.25
1.00
1.00
1.00
MID
MID
MID
pin is used to center this input span anywhere in the
DD
− 1.25 V to V
MID
MID
. For V
− 1.0 V to V
.
MID
and the input span for various values of V
DD
DD
V
Max
4.25
3.75
3.25
2.3
2.0
1.7
is from 1.0 V to V
MID
MID
detector circuit. A 5 V operation of the ADCs
falls below 3.8 V. This circuit also possesses
DD
DD
DD
Ext
DD
DD
pin can be left unconnected, or in some
exceeds 4.1 V, and a 3 V operation is
= 3 V ± 10%, the range of values that can
. If no input voltage is applied to V
). This input span is automatically set up
= 5 V ± 10%. Table 5 shows the relevant
MID
MID
AD7822/AD7825/AD7829
MID
MID
V
3.0 to 5.5
2.5 to 5.0
2.0 to 4.5
1.3 to 3.3
1.0 to 3.0
0.7 to 2.7
+ 1.25 V (V
that can be applied depends on the
IN
+ 1.0 V (V
is applied, the analog input range
Span
DD
− 1.0 V and from 1.25 V to
V
Min
1.25
1.25
1.25
1.00
1.00
1.00
DD
DD
MID
DD
= 3 V ± 10%), or
Ext
= 5 V ± 10%).
DD
detector.
= 3 V ± 10%),
V
0 to 2.5
0 to 2.5
0 to 2.5
0 to 2.0
0 to 2.0
0 to 2.0
IN
D
Span
D = 5 V ±
DD
MID
.
Unit
V
V
V
V
V
V
,

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