AD9224 Analog Devices, AD9224 Datasheet - Page 16

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AD9224

Manufacturer Part Number
AD9224
Description
12-Bit 40 MSPS Monolithic A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9224

Resolution (bits)
12bit
# Chan
1
Sample Rate
40MSPS
Interface
Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref) p-p,2 V p-p,4 V p-p,Uni (Vref) x 2,Uni 2.0V,Uni 4.0V
Adc Architecture
Pipelined
Pkg Type
SOP

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AD9224
REFERENCE CONFIGURATIONS
The figures associated with this section on internal and external
reference operation do not show recommended matching series
resistors for VINA and VINB for the purpose of simplicity.
Please refer to the Driving the Analog Inputs section for a dis-
cussion of this topic. Also, the figures do not show the decou-
pling network associated with the CAPT and CAPB pins.
Please refer to the Reference Operation section for a discussion
of the internal reference circuitry and the recommended decou-
pling network shown in Figure 17.
USING THE INTERNAL REFERENCE
Single-Ended Input with 0 to 2
Figure 26a shows how to connect the AD9224 for a 0 V to 2 V
or 0 V to 4 V input range via pin strapping the SENSE pin. An
intermediate input range of 0 to 2
using the resistor programmable configuration in Figure 28.
In either case, both the midscale voltage and input span are
directly dependent on the value of VREF. More specifically, the
midscale voltage is equal to VREF while the input span is equal
to 2
VREF. When VINA is
when VINA is
Shorting the VREF pin directly to the SENSE pin places the
internal reference amplifier in unity-gain mode and the resultant
VREF output is 1 V. Therefore, the valid input range is 0 V to
2 V. However, shorting the SENSE pin directly to the REFCOM
pin configures the internal reference amplifier for a gain of 2.0
and the resultant VREF output is 2.0 V. Thus, the valid input
range becomes 0 V to 4 V. The VREF pin should be bypassed to
the REFCOM pin with a 10 F tantalum capacitor in parallel
with a low-inductance 0.1 F ceramic capacitor.
2
Figure 26a. Internal Reference—2 V p-p Input Span,
V
CM
VREF. Thus, the valid input range extends from 0 to 2
VREF
0V
= 1 V, or 4 V p-p Input Span
2
VREF, the digital output will be FFF Hex.
SHORT FOR 0V TO 2V
SHORT FOR 0V TO 4V
0 V, the digital output will be 000 Hex;
10 F
INPUT SPAN
INPUT SPAN
0.1 F
VREF Range
VREF can be established
VINA
VINB
VREF
SENSE
REFCOM
AD9224
–16–
Figure 26b illustrates the relation between reference voltage and
THD. Note that optimal performance occurs when the refer-
ence voltage is set to 1.5 V (input span = 3 V).
Figure 27 shows the single-ended configuration that gives good
dynamic performance (SINAD, SFDR). To optimize dynamic
specifications, center the common-mode voltage of the analog
input at approximately by 2.5 V by connecting VINB to a low
impedance 2.5 V source. As described above, shorting the
VREF pin directly to the SENSE pin results in a 1 V reference
voltage and a 2 V p-p input span. The valid range for input
signals is 1.5 V to 3.5 V. The VREF pin should be bypassed to
the REFCOM pin with a 10 F tantalum capacitor in parallel
with a low-inductance 0.1 F ceramic capacitor.
This reference configuration could also be used for a differential
input in which VINA and VINB are driven via a transformer as
shown in Figure 24. In this case, the common-mode voltage,
V
tap to CML of the AD9224. VREF can be configured for 1.0 V or
2.0 V by connecting SENSE to either VREF or REFCOM re-
spectively. Note that the valid input range for each of the
differential inputs is one half of the single-ended input and thus
becomes V
CM
Figure 26b. THD vs. Reference Voltage, F
F
IN
, is set at midsupply by connecting the transformer’s center
Figure 27. Internal Reference—2 V p-p Input Span,
V
CM
= 10 MHz (Differential)
–60
–65
–70
–75
–80
–85
–90
= 2.5 V
1.0
3.5V
1.5V
CM
– VREF/2 to V
10 F
1.2
REFERENCE VOLTAGE – V
1.4
0.1 F
CM
+ VREF/2.
1.6
1V
VCM
VINB
VINA
VREF
SENSE
REFCOM
1.8
AD9224
2.0
S
= 40 MHz,
2.2
REV. A

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