AD7475 Analog Devices, AD7475 Datasheet - Page 7

• Manufacturer Part Number: AD7475
• Description: 1 MSPS, 12-Bit A/D Converter in MSOP-8 or SOIC-8
• Manufacturer: Analog Devices

Specifications of AD7475

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 1MSPS
• Interface: Ser
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: SOIC,SOP

TIMING SPECIFICATIONS
V
Table 3.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
SCLK
CONVERT
QUIET
2
3
4
5
6
7
8
9
POWER-UP
Guaranteed by initial characterization. All input signals are specified with tr = tf = 5 ns (10% to 90% of V
Mark/space ratio for the SCLK input is 40/60 to 60/40.
Measured with the load circuit of Figure 4 and defined as the time required for the output to cross 0.8 V or 2.0 V.
t
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times, t
the true bus relinquish times of the part and are independent of the bus loading.
3
4
8
DD
and t
2
= 2.7 V to 5.25 V, V
9
are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 4. The measured number is
DRIVE
Limit at T
10
20
16 × t
800
100
10
22
40
0.4 t
0.4 t
10
10
45
20
20
650
= 2.7 V to 5.25 V, REF IN = 2.5 V (AD7475), T
SCLK
SCLK
SCLK
MIN
, T
1
MAX
Unit
kHz min
MHz max
ns max
ns min
ns min
ns max
ns max
ns min
ns min
ns min
ns min
ns max
ns max
μs max
μs max
Rev. B | Page 7 of 24
Description
t
f
Minimum quiet time required between conversions
CS to SCLK setup time
Delay from CS until SDATA three-state disabled
Data access time after SCLK falling edge
SCLK low pulse width
SCLK high pulse width
SCLK to data valid hold time
SCLK falling edge to SDATA high impedance
SCLK falling edge to SDATA high impedance
CS rising edge to SDATA high impedance
Power-up time from full power-down (AD7475)
Power-up time from full power-down (AD7495)
SCLK
SCLK
A
= T
= 20 MHz
= 1/f
MIN
SCLK
to T
DRIVE
MAX
) and timed from a voltage level of 1.6 V.
, unless otherwise noted.
8
and t
9
, quoted in the timing characteristics are
AD7475/AD7495