AD7719 Analog Devices, AD7719 Datasheet - Page 38

• Manufacturer Part Number: AD7719
• Description: Low Voltage, Low Power, 16-/24-Bit, Dual Sigma Delta ADC
• Manufacturer: Analog Devices

Specifications of AD7719

• Resolution (bits): 24bit
• # Chan: 6
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: (2Vref) p-p,(2Vref/PGA Gain) p-p,(Vref) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOIC,SOP

AD7719
In this 3-wire configuration, the lead resistances will result in
errors if only one current source is used because the 200 µA will
flow through RL1, developing a voltage error between AIN1 and
AIN2. In the scheme outlined below, the second RTD current
source is used to compensate for the error introduced by the
200 µA flowing through RL1. The second RTD current flows
through RL2. Assuming RL1 and RL2 are equal (the leads
would normally be of the same material and of equal length),
and IOUT1 and IOUT2 match, the error voltage across RL2
equals the error voltage across RL1, and no error voltage is
developed between AIN1 and AIN2. Twice the voltage is
developed across RL3, but since this is a common-mode voltage,
it will not introduce errors. R
flowing through the combination of RL3 and R
voltage that the analog input voltage seen by the AD7719 is
within the common-mode range of the ADC. The reference
voltage for the AD7719 is also generated using one of these
matched current sources. This reference voltage is developed
across the 12.5 kΩ resistor as shown, and applied to the differential
reference inputs of the AD7719. This scheme ensures that the analog
input voltage span remains ratiometric to the reference voltage.
Any errors in the analog input voltage due to the temperature drift
of the RTD current source is compensated for by the variation
VARIABLES
SECONDARY
VARIABLES
MAIN
10 F
AIN3
AIN4
DV
AIN1
AIN2
AIN5
AIN5 COM
DGND
0.1 F
CM
DD
AD7719
is included so the current
REFIN(+)
REFIN(–)
REFIN2
AGND
DOUT
SCLK
AV
Figure 24. Smart Transmitter Employing the AD7719
DIN
CS
DD
CM
0.1 F
develops enough
MICROCONTROLLER
GND
V
CC
–38–
in the reference voltage. The typical drift matching between the
two RTD current sources is less than 1 ppm/°C. The voltage on
either I
Smart Transmitters
Smart transmitters are another key design-in area for the AD7719.
The dual Σ-∆ converter, single-supply operation, 3-wire interface
capabilities, and small package size are all of benefit in smart
transmitters. Here, the entire smart transmitter must operate
from the 4 to 20 mA loop. Tolerances in the loop mean that the
amount of current available to power the transmitter is as low as
3.5 mA. Figure 24 shows a block diagram of a smart transmitter,
which includes the AD7719.
Not shown in Figure 24 is the isolated power source required to
power the front end. The advantages of the AD7719 in these
applications is the dual-channel operation, meaning that the
user does not have to interrupt the main channel when measur-
ing secondary variables, and therefore does not have the latency
associated with the settling times of the digital filter. The fact
that the AD7719 is factory-calibrated means that in the majority
of applications, the user will not have to perform any field cali-
bration given the excellent offset and gain drift performance of
the device as a result of the signal chain chopping employed in
the signal chain.
4.7 F
OUT
1.25V
3.3V
pin can go to within 0.6 V of the AV
REF IN
CLOCK
LATCH
REF OUT2
DATA
COM
REF OUT1
10 F
C1
BOOST V
AD421
DN25D
C2
CC
0.01 F
C3
COMP
DRIVE
LOOP
LV
RTN
1000pF
0.01 F
1k
DD
POWER
LOOP
supply.
REV. A