AD7676 Analog Devices, AD7676 Datasheet
AD7676
Specifications of AD7676
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AD7676 Summary of contents
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... Excellent INL The AD7676 has a maximum integral nonlinearity of 1.0 LSB with no missing 16-bit code. 2. Superior AC Performances The AD7676 has a minimum dynamic typical. 3. Fast Throughput The AD7676 is a 500 kSPS, charge redistribution, 16-bit SAR ADC with internal error correction circuitry. 4. Single-Supply Operation The AD7676 operates from a single 5 V supply and typically dissipates only 67 mW. It consumes 7 µ ...
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... AD7676–SPECIFICATIONS Parameter Conditions RESOLUTION ANALOG INPUT Voltage Range V Operating Input Voltage V Analog Input CMRR f Input Current 500 kSPS Throughput Input Impedance THROUGHPUT SPEED Complete Cycle Throughput Rate DC ACCURACY Integral Linearity Error No Missing Codes Transition Noise 2 +Full-Scale Error 2 –Full-Scale Error 2 Zero Error AVDD = 5 V ± ...
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... See Table I 1. pF; otherwise, the load maximum. L AD7676 Unit ns µs ns µ µ µ ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7676 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... SDOUT only when the conversion is complete. 17 OGND P Input/Output Interface, Digital Power Ground 18 OVDD P Input/Output Interface, Digital Power. Nominally at the same supply as the supply of the host interface ( V). 19 DVDD P Digital Power. Nominally DGND P Digital Power Ground REV. B PIN FUNCTION DESCRIPTIONS –5– AD7676 ...
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... also used to gate the external serial clock. 33 RESET DI Reset Input. When set to a logic HIGH, resets the AD7676. Current conversion if any is aborted Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions are inhibited after the current one is completed. ...
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... Aperture delay is a measure of the acquisition performance and is measured from the falling edge of the CNVST input to when the input signal is held for a conversion. Transient Response The time required for the AD7676 to achieve its rated accuracy after a full-scale step function is applied to its input. –7– AD7676 ...
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... AD7676 –Typical Performance Characteristics 1.00 0.75 0.50 0.25 0 –0.25 –0.50 –0.75 –1.00 0 16384 32768 CODE TPC 1. Integral Nonlinearity vs. Code 9000 8271 8094 8000 7000 6000 5000 4000 3000 2000 1000 0000 7FFB 7FFC 7FFD 7FFE 7FFF 8000 8001 CODE IN HEXA TPC 2. Histogram of 16,384 Conversions Input at ...
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... TPC 11. Operating Currents vs. Sample Rate –104 250 200 –106 150 –108 100 –110 50 –112 0 85 105 125 –55 TPC 12. Power-Down Operating Currents vs. Temperature –9– AD7676 OVDD = 2. OVDD = 2. OVDD = 5. OVDD = 5. 100 150 C – AVDD DVDD OVDD 100 1k 10k 100k SAMPLING RATE – ...
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... ADC that does not exhibit any pipeline or latency, making it ideal for multiple multiplexed channel applications. The AD7676 can be operated from a single 5 V supply and be interfaced to either digital logic housed in a 48-lead LQFP package or a 48-lead LFCSP package that combines space savings and allows flexible configurations as either serial or parallel interface ...
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... Figure 5 shows a typical connection diagram for the AD7676. Different circuitry shown on this diagram is optional and is discussed below. Analog Inputs The AD7676 is specified to operate with a differential ± 2.5 V range. The typical input impedance for each analog input range is also shown. Figure 6 shows a simplified analog input section of the AD7676. ...
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... AD7676. • The noise generated by the driver amplifier needs to be kept as low as possible to preserve the SNR and transition noise performance of the AD7676. The noise coming from the driver is filtered by the AD7676 analog input circuit one-pole, low-pass filter made by R+, R–, and C ...
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... The AD780 can be selected with reference voltage. Power Supply The AD7676 uses three sets of power supply pins: an analog 5 V supply AVDD, a digital 5 V core supply DVDD, and a digital input/output interface supply OVDD. The OVDD supply allows direct interface with any logic working between 2 ...
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... The serial interface is multiplexed on the parallel databus. The AD7676 digital interface also accommodates both logic by simply connecting the OVDD supply pin of the AD7676 to the host system interface digital supply. Finally, by using the OB/2C input pin, either twos complement or straight binary coding can be used ...
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... SCLK pin. MASTER SERIAL INTERFACE Internal Clock The AD7676 is configured to generate and provide the serial data clock SCLK when the EXT/INT pin is held LOW. The AD7676 also generates a SYNC signal to indicate to the host when the serial CS ...
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... Usually, because the AD7676 has a longer acquisition phase than the conversion phase, the data are read immediately after conversion. While the AD7676 is performing a bit decision important that voltage transients not occur on digital input/output pins or degradation of the conversion result could occur. This is particu- ...
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... REV. B interface or with a general-purpose Serial Port or I/O Ports on a microcontroller. A variety of external buffers can be used with the AD7676 to prevent digital noise from coupling into the ADC. The following sections illustrate the use of the AD7676 with an SPI-equipped microcontroller, and the ADSP-21065L and ADSP-218x signal processors. ...
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... PINS OMITTED FOR CLARITY Figure 22. Interfacing the AD7676 to SPI Interface ADSP-21065L in Master Serial Interface As shown in Figure 23, the AD7676 can be interfaced to the ADSP-21065L using the serial interface in Master Mode without any glue logic required. This mode combines the advantages of reducing the wire connections and the ability to read the data during or after conversion maximum speed transfer (DIVSCLK[0:1] both LOW) ...
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... Frame Chip Scale Package [LFCSP] (CP-48) Dimensions shown in millimeters 7.00 0.60 MAX 0.60 MAX 37 36 6.75 TOP BSC SQ VIEW 0.50 0. 0.30 0.70 MAX 0.65 NOM 0.05 MAX 0.02 NOM 0.50 BSC COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2 –19– AD7676 9.00 BSC 37 36 7.00 TOP VIEW BSC (PINS DOWN 0.27 0.22 0.17 0.30 0.23 PIN 1 0.18 INDICATOR 48 1 5.25 BOTTOM 4.70 VIEW 2. ...
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Revision History Location 10/02—Data Sheet changed from REV REV. B. Added 48-Lead LFCSP to FEATURES and GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . ...