AD7490 Analog Devices, AD7490 Datasheet

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AD7490

Manufacturer Part Number
AD7490
Description
16-Channel, 1MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7490

Resolution (bits)
12bit
# Chan
16
Sample Rate
1MSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
Uni (Vref),Uni (Vref) x 2
Adc Architecture
SAR
Pkg Type
CSP,SOP

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FEATURES
Fast throughput rate: 1 MSPS
Specified for V
Low power at maximum throughput rates
16 (single-ended) inputs with sequencer
Wide input bandwidth
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface, SPI/QSPI™/MICROWIRE™/
Full shutdown mode: 0.5 μA maximum
28-lead TSSOP and 32-lead LFCSP packages
GENERAL DESCRIPTION
The AD7490 is a 12-bit high speed, low power, 16-channel,
successive approximation ADC. The part operates from a single
2.7 V to 5.25 V power supply and features throughput rates up
to 1 MSPS. The part contains a low noise, wide bandwidth
track-and-hold amplifier that can handle input frequencies in
excess of 1 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock signal, allowing the device to
easily interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS , and conversion is also
initiated at this point. There are no pipeline delays associated
with the part.
The AD7490 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. For maximum
throughput rates, the AD7490 consumes just 1.8 mA with 3 V
supplies, and 2.5 mA with 5 V supplies.
By setting the relevant bits in the control register, the analog
input range for the part can be selected to be a 0 V to REF
input or a 0 V to 2 × REF
or twos complement output coding. The AD7490 features 16
single-ended analog inputs with a channel sequencer to allow a
preprogrammed selection of channels to be converted sequen-
tially. The conversion time is determined by the SCLK
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
5.4 mW maximum at 870 kSPS with 3 V supplies
12.5 mW maximum at 1 MSPS with 5 V supplies
69.5 dB SNR at 50 kHz input frequency
DSP compatible
DD
of 2.7 V to 5.25 V
IN
input, with either straight binary
IN
with Sequencer in 28-Lead TSSOP
16-Channel, 1 MSPS, 12-Bit ADC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
frequency because this is also used as the master clock to
control the conversion.
The AD7490 is available in a 32-lead LFCSP and a 28-lead
TSSOP package.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
The AD7490 offers up to 1 MSPS throughput rates. At
maximum throughput with 3 V supplies, the AD7490
dissipates just 5.4 mW of power.
A sequence of channels can be selected, through which the
AD7490 cycles and converts.
The AD7490 operates from a single 2.7 V to 5.25 V supply.
The V
directly to either 3 V or 5 V processor systems independent
of V
The conversion rate is determined by the serial clock,
allowing the conversion time to be reduced through the
serial clock speed increase. The part also features various
shutdown modes to maximize power efficiency at lower
throughput rates. Power consumption is 0.5 μA, maximum,
when in full shutdown.
The part features a standard successive approximation
ADC with accurate control of the sampling instant via a CS
input and once off conversion control.
REF
V
V
IN
IN
15
IN
0
DD
DRIVE
.
FUNCTIONAL BLOCK DIAGRAM
SEQUENCER
function allows the serial interface to connect
AD7490
INPUT
MUX
©2002–2009 Analog Devices, Inc. All rights reserved.
T/H
Figure 1.
AGND
V
DD
APPROXIMATION
SUCCESSIVE
CONTROL
LOGIC
12-BIT
ADC
AD7490
www.analog.com
SCLK
DOUT
DIN
CS
V
DRIVE

Related parts for AD7490

AD7490 Summary of contents

Page 1

... V supplies, the AD7490 dissipates just 5 power sequence of channels can be selected, through which the AD7490 cycles and converts. 3. The AD7490 operates from a single 2 5.25 V supply. The V function allows the serial interface to connect DRIVE directly to either processor systems independent of V ...

Page 2

... AD7490 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings ............................................................ 6 ESD Caution .................................................................................. 6 Pin Configurations and Function Descriptions ........................... 7 Typical Performance Characteristics ............................................. 8 Terminology .................................................................................... 10 Internal Register Structure ............................................................ 12 Control Register .......................................................................... 12 REVISION HISTORY 6/09—Rev Rev. C Change to I Auto Standby Mode Parameter, Table 1 ...

Page 3

... REF 0 2 × REF ±1 20 2.5 ±1 36 AD7490 Unit MHz MHz Bits LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB ...

Page 4

... AD7490 Parameter LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current Input Capacitance LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating State Leakage Current 3 Floating State Output Capacitance Output Coding CONVERSION RATE Conversion Time ...

Page 5

... Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0 0 represents a worst-case figure for having ADD3 available on the DOUT line, that is, if the AD7490 goes back into three-state at the end of a conversion and some 3 other device takes control of the bus between conversions, the user has to wait a maximum time of t weakly driven to ADD3 between conversions, the user typically has to wait and after the CS falling edge before seeing ADD3 valid on DOUT ...

Page 6

... AD7490 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to GND GND DRIVE Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND REF to GND IN Input Current to Any Pin Except Supplies Operating Temperature Ranges Commercial (B Version) ...

Page 7

... Reference Input for the AD7490. An external reference must be applied to this input. The voltage range for the external reference is 2.5 V ± 1% for specified performance. Power Supply Input. The V range for the AD7490 is from 2 5.25 V. For the × REF DD range, V should be from 4. 5.25 V. ...

Page 8

... Figure 5 shows a typical FFT plot for the AD7490 at 1 MSPS sample rate and 50 kHz input frequency. Figure 7 shows the power supply rejection ratio vs. supply ripple frequency for the AD7490. The power supply rejection ratio is defined as the ratio of the power in the ADC output at full-scale frequency f, to the power of a 200 mV p-p sine wave applied to the ADC V of frequency f ...

Page 9

... CODE Figure 10. Typical INL 1.0 V 0.8 TEMPERATURE = 25°C 0 1000Ω IN 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 1000 0 3584 4096 Rev Page DRIVE 512 1024 1536 2048 2560 3072 3584 CODE Figure 11. Typical DNL AD7490 4096 ...

Page 10

... N-bit converter with a sine wave input is given by to Signal-to-(Noise + Distortion) (dB 1.76 IN Thus for a 12-bit converter, this is 74 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7490 defined as THD where sixth harmonics ...

Page 11

... The AD7490 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second order terms are usually distanced in frequency from the original sine waves, and the third order terms are usually at a frequency close to the input frequencies ...

Page 12

... CODING This bit selects the type of output coding used by the AD7490 for the conversion result. If this bit is set to 0, the output coding for the part is twos complement. If this bit is set to 1, the output coding from the part is straight binary (for the next conversion). ...

Page 13

... PM0 Mode 1 1 Normal operation. In this mode, the AD7490 remains in full power mode, regardless of the status of any of the logic inputs. This mode allows the fastest possible throughput rate from the AD7490 Full shutdown. In this mode, the AD7490 is in full shutdown mode, with all circuitry on the AD7490 powering down. The AD7490 retains the information in the control register while in full shutdown ...

Page 14

... AD7490 SHADOW REGISTER The Shadow register on the AD7490 is a 16-bit, write-only register. Data is loaded from the DIN pin of the AD7490 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that a conversion result is read from the part. This requires 16 serial falling edges for the data transfer. The ...

Page 15

... SEQ = 1, SHADOW = 0 CONTINUOUSLY CONVERTS ON THE SELECTED SEQUENCE OF CHANNELS BUT WILL ALLOW RANGE, CODING, AND SO ON, WRITE BIT = 1, TO CHANGE IN THE CONTROL REGISTER SEQ = 1, WITHOUT INTERRUPTING THE SEQUENCE SHADOW = 0 PROVIDED, SEQ = 1, SHADOW = 0 Figure 14. SEQ Bit = 1, SHADOW Bit = 1 Flowchart Rev Page AD7490 ...

Page 16

... The AD7490 is a fast, 16-channel, 12-bit, single-supply, analog- to-digital converter. The parts can be operated from a 2 5.25 V supply. When operated from supply and provided with a 20 MHz clock, the AD7490 is capable of throughput rates MSPS. The AD7490 provides the user with an on-chip, track-and-hold ADC and a serial interface housed in either a 28-lead TSSOP or 32-lead LFCSP package ...

Page 17

... Figure 9). ADC TRANSFER FUNCTION The output coding of the AD7490 is either straight binary or twos complement depending on the status of the LSB (CODING bit) in the control register. The designed code transitions occur midway between successive LSB values (that is, 1 LSB, 2 LSBs, and so on) ...

Page 18

... In Figure 21, REF IN decoupled 2.5 V supply from a reference source, the AD780, to provide an analog input range 2.5 V (if the RANGE bit (if the RANGE bit is 0). Although the AD7490 is connected the serial interface is connected microprocessor ...

Page 19

... Reference Section An external reference source should be used to supply the 2.5 V reference to the AD7490. Errors in the reference source result in gain errors in the AD7490 transfer function and add to the specified full-scale errors of the part. A capacitor of at least 0.1 μF should be placed on the REF pin. Suitable reference sources ...

Page 20

... Figure 25 shows the general diagram of the operation of the AD7490 in this mode. When the part is in standby, portions of the AD7490 are powered-down, but the on-chip bias generator remains powered up. The part retains information in the control register during standby ...

Page 21

... Powering Up the AD7490 When supplies are first applied to the AD7490, the ADC may power up in any of the operating modes of the part. To ensure that the part is placed into the required operating mode, the user should perform a dummy cycle operation, as outlined in Figure 26. ...

Page 22

... SCLK falling edge, the DOUT line goes back into TRI bit is set to 0). Sixteen three-state (assuming the WEAK/ serial clock cycles are required to perform the conversion process and to access data from the AD7490. The 12 bits of conversion data are preceded by the four channel address bits ...

Page 23

... If the throughput rate is 100 kSPS, the cycle time is 10 μs and the average power dissipated during each cycle is When operating the AD7490 in auto standby mode (PM1 = PM0 = 100 kSPS), the AD7490 power dissipation is calculated as shown in Equation 2. The maximum power dissipation is 12 during nor- mal operation. Again the power-up time from auto standby is one dummy cycle, 1 μ ...

Page 24

... AD7490 MICROPROCESSOR INTERFACING The serial interface on the AD7490 allows the part to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7490 with some of the more common microcontroller and DSP serial interface protocols. AD7490 to TMS320C541 The serial interface on the TMS320C541 uses a continuous serial clock and frame synchronization signals to synchronize the data transfer operations with peripheral devices like the AD7490 ...

Page 25

... All three AGND pins of the AD7490 should be sunk in the AGND plane. Digital and analog ground planes should be joined at only one place. If the AD7490 system where multiple devices require an AGND to DGND connection, the connection should still be made at one point only, a star ground point that should be established as close as possible to the AD7490 ...

Page 26

... AD7490 OUTLINE DIMENSIONS PIN 1 0.15 0.05 COPLANARITY PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE 9.80 9.70 9. 4.50 4.40 4. 0.65 BSC 1.20 MAX 0.30 0.20 0.19 SEATING 0.09 PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AE Figure 33. 28-Lead Thin Shrink Small Outline Package [TSSOP] (RU-28) Dimensions shown in millimeters 5.00 BSC SQ 0.60 MAX 0.50 BSC TOP 4.75 VIEW BSC SQ 0.50 0.40 0.30 0.80 MAX 0.65 TYP ...

Page 27

... This board is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending designator. To order a complete evaluation kit, you need to order the particular ADC evaluation board (for example, EVAL-AD7490CBZ), the EVAL-CONTROL-BRD2, and transformer. See the relevant evaluation board data sheet for more information ...

Page 28

... AD7490 NOTES ©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02691-0-6/09(C) Rev Page ...

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