AD7923 Analog Devices, AD7923 Datasheet - Page 18

• Manufacturer Part Number: AD7923
• Description: 4-Channel 200 kSPS, 12-Bit A/D Converter with Sequencer in 16-Lead TSSOP
• Manufacturer: Analog Devices

Specifications of AD7923

• Resolution (bits): 12bit
• # Chan: 4
• Sample Rate: 200kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: SOP

AD7923
Only a portion of the cycle time is taken up by the conversion
time and the dummy transfer for wakeup. In this mode, the
power con-sumption of the part is greatly reduced because the
part enters shutdown at the end of each conversion. When the
control register is programmed to move into auto shutdown, it
does so at the end of the conversion. The user can move the
ADC in and out of the low power state by controlling the CS
signal.
POWERING UP THE AD7923
When supplies are first applied to the AD7923, the ADC can
power up in any of the operating modes of the part. To ensure
that the part is placed into the required operating mode, the
user should perform a dummy cycle operation, as outlined in
Figure 23 through Figure 25.
The dummy conversion operation must be performed to place
the part into the desired mode of operation. To ensure that the
part is in normal mode, this dummy cycle operation can be
performed with the DIN line tied high, that is, PM1, PM0 = 1, 1
(depending on other required settings in the control register),
but the minimum power-up time of 1 μs must be allowed from
the rising edge of CS , where the control register is updated,
before attempting the first valid conversion. This is to allow for
the possibility that the part initially powered up in shutdown.
DOUT
DOUT
SCLK
SCLK
PART IS IN FULL
SHUTDOWN
DIN
DIN
CS
CS
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS, PM1 = 0, PM0 = 1
1
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS. PM1 = 1, PM0 = 1
DATA INTO CONTROL REGISTER
1
DATA INTO CONTROL REGISTER
12
PART ENTERS
SHUTDOWN ON CS
RISING EDGE AS
PM1 = 0, PM0 =1
16
PART BEGINS TO POWER UP ON
CS RISING EDGE AS PM1 = PM0 =1
PART BEGINS
TO POWER
UP ON CS
FALLING EDGE
Figure 22. Auto Shutdown Mode Operation
Figure 21. Full Shutdown Mode Operation
CONTROL REGISTER CONTENTS SHOULD
NOT CHANGE, WRITE BIT = 0
1
14
DATA INTO CONTROL REGISTER
DUMMY CONVERSION
Rev. C | Page 18 of 24
16
INVALID DATA
t
12
If the desired mode of operation is full shutdown, then again
only one dummy cycle is required after supplies are applied. In
this dummy cycle, the user simply sets the power management
bits, PM1, PM0 = 1, 0, and upon the rising edge of CS at the
end of that serial transfer, the part enters full shutdown. If the
desired mode of operation is auto shutdown after supplies are
applied, two dummy cycles are required, the first with DIN tied
high and the second dummy cycle to set the power manage-
ment bits PM1 and PM0 = 0,1. On the second CS rising edge
after the supplies are applied, the control register contains the
correct information and the part enters auto shutdown mode as
programmed. If power consumption is of critical concern, then
in the first dummy cycle the user may set PM1, PM0 = 1, 0, that
is, full shutdown, and then place the part into auto shutdown in
the second dummy cycle. For illustration purposes,
shown with DIN tied high on the first dummy cycle in this case.
Figure 23, Figure 24, and Figure 25 each show the required
dummy cycle(s) after supplies are applied in the case of normal
mode, full shutdown mode, and auto shutdown mode, respect-
ively, being the desired mode of operation.
12
THE PART IS FULLY POWERED UP
ONCE
1
TO KEEP THE PART IN NORMAL MODE, LOAD
PM1 = PM0 = 1 IN CONTROL REGISTER
t
16
POWER UP
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
PART IS FULLY
POWERED UP
HAS ELAPSED
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
TO KEEP PART IN THIS MODE, LOAD PM1 = 0, PM0 = 1
IN CONTROL REGISTER OR SET WRITE BIT = 0
DATA INTO CONTROL REGISTER
1
DATA INTO CONTROL REGISTER
12
PART ENTERS
SHUTDOWN ON CS
RISING EDGE AS
PM1 = 0, PM0 =1
14
16
Figure 25
16
is