AD7739 Analog Devices, AD7739 Datasheet - Page 26

• Manufacturer Part Number: AD7739
• Description: 8-Channel, 4 kHz, 24-Bit Sigma-Delta A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7739

• Resolution (bits): 24bit
• # Chan: 8
• Sample Rate: 3.05MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
• Ain Range: Bip 0.625,Bip 1.25,Bip 2.5V,Uni 0.625,Uni 1.25,Uni 2.5V
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7739
CIRCUIT DESCRIPTION
The AD7739 is a high precision analog-to-digital converter that
is intended for the measurement of wide dynamic range, low
frequency signals in industrial process control, instrumentation,
and PLC systems.
It contains a multiplexer, an input buffer, a sigma-delta
(or charge balancing) ADC, a digital filter, a clock oscillator,
a digital I/O port, and a serial communications interface.
ANALOG INPUTS
The AD7739 has nine analog input pins connected to the ADC
through the internal multiplexer. The analog front end can be
configured as eight single-ended inputs or four differential
inputs or any combination of these (via the channel setup
registers).
The AD7739 contains a wide bandwidth, fast settling time
differential input buffer capable of driving the dynamic load of
a high speed sigma-delta modulator. With the internal buffer
enabled, the analog inputs feature high input impedance.
If chopping is enabled or when switching between channels,
there is a dynamic current on analog inputs charging the
internal capacitance of the multiplexer and input buffer. The
capacitance is approximately 10 pF.
At the start of each conversion, there is a delay to allow the
capacitance to be charged (see the Multiplexer, Conversion, and
Data Output Timing section). If the analog inputs resistive
source impedance does not exceed 50 kΩ, the internal
capacitance is charged fast enough and the AD7739
performance is not affected at the 16-bit level.
An external RC filter connected to the analog inputs would
average the multiplexer channel-to-channel switching dynamic
currents to a dc current leading to a dc voltage drop across the
AIN(+)
AIN(–)
MULTIPLEXER
CHOP
BUFFER
CHOP
Figure 23. Channel Signal Chain Diagram with Chopping Enabled
MODULATOR
f
MCLK
Σ-∆
/2
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DIGITAL
FILTER
CHOP
external input resistance. To avoid additional gain errors, offset
errors, and channel-to-channel crosstalk due to this effect, low
resistor values should be used in the low-pass RC filter for the
AD7739. The recommended low-pass RC filter for the analog
inputs is 100 Ω and 100 nF.
The average (dc) current, charging the capacitance on the
multiplexer output, is related to the equation:
I ≈ C
Where C
approximately 10 pF , V
multiplexer output between two subsequent conversions, which
can be up to 5 V, and F
which relates to the sum of conversion times on all
subsequently sampled channels.
SIGMA-DELTA ADC
The AD7739 core consists of a charge balancing sigma-delta
modulator and a digital filter. The architecture is optimized for
fast, fully settled conversion. This allows for fast channel-to-
channel switching while maintaining inherently excellent
linearity, high resolution, and low noise.
CHOPPING
With chopping enabled, the multiplexer repeatedly reverses the
ADC inputs. Every output data result is then calculated as an
average of two conversions, the first with the positive and the
second with the negative offset term included. This effectively
removes any offset error of the input buffer and sigma-delta
modulator. Figure 23 shows the channel signal chain with
chopping enabled.
MUX
+
–
(CALIBRATIONS)
× V
MUX
ARITHMETIC
SCALING
MUX
is the capacitance on the multiplexer output,
× F
S
S
MUX
is the channel sampling frequency,
is the voltage difference on the
INTERFACE
DIGITAL
OUTPUT DATA
AT THE SELECTED
DATA RATE
03742-0-023