AD9289 Analog Devices, AD9289 Datasheet - Page 20

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AD9289

Manufacturer Part Number
AD9289
Description
Quad 8-Bit, 65 MSPS, Serial LVDS A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9289

Resolution (bits)
8bit
# Chan
4
Sample Rate
65MSPS
Interface
Ser
Analog Input Type
Diff-Uni
Ain Range
1 V p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

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AD9289
EVALUATION BOARD
The AD9289 evaluation board provides all of the support cir-
cuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially
through a transformer (default) or the AD8351 driver. Provi-
sions have also been made to drive the ADC single-ended.
Separate power pins are provided to isolate the DUT from the
support circuitry. Each input configuration can be selected by
proper connection of various jumpers (refer to the schematics).
Figure 37 shows the typical bench characterization setup used
to evaluate the ac performance of the AD9289. It is critical that
ROHDE AND SCHWARZ,
ROHDE AND SCHWARZ,
2V p-p SIGNAL
2V p-p SIGNAL
SYNTHESIZER
SYNTHESIZER
SMHU,
SMHU,
BAND-PASS
FILTER
XFMR
INPUT
CLK
3.0V
EVALUATION BOARD
+
AD9289
Figure 37. Evaluation Board Connections
3.0V
+
Rev. 0 | Page 20 of 32
3.3V
CHA–CHD
+
SERIAL
LVDS
8-BIT
the signal sources that are used have very low phase noise
(< 1 ps rms jitter) to realize the ultimate performance of the
converter. Proper filtering of the analog input signal to
remove harmonics and lower the integrated or broadband
noise at the input is also necessary to achieve the specified
noise performance.
See Figure 37 to Figure 47 for complete schematics and layout
plots, which demonstrate the routing and grounding techniques
that should be applied at the system level.
DE-SERIALIZATION
HSC-ADC-FPGA
HIGH-SPEED
BOARD
PARALLEL
CMOS
8-BIT
2 CH
HSC-ADC-EVAL-DC
FIFO DATA
CAPTURE
CONNECTION
BOARD
USB
ANALYZER
RUNNING
ADC
PC

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