AD7793 Analog Devices, AD7793 Datasheet
AD7793
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AD7793 Summary of contents
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... The AD7792/AD7793 are low power, low noise, complete analog front ends for high precision measurement applications. The AD7792/AD7793 contain a low noise 16-/24-bit ∑-Δ ADC with three differential analog inputs. The on-chip, low noise instrumentation amplifier means that signals of small ampli- tude can be interfaced directly to the ADC ...
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... AD7792/AD7793 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics..................................................................... 6 Timing Diagrams.......................................................................... 7 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Output Noise and Resolution Specifications .............................. 11 External Reference...................................................................... 11 Internal Reference ...................................................................... 12 Typical Performance Characteristics ........................................... 13 On-Chip Registers .......................................................................... 14 Communications Register ...
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... Rev Page AD7792/AD7793 unless otherwise noted. MAX Test Conditions/Comments f < 242 Hz, AD7793 ADC AD7792 See Output Noise and Resolution Specifications See Output Noise and Resolution Specifications Gain = 1 to 16, external reference Gain = 32 to 128, external reference AIN = 1 V/gain, gain ≥ 4, external reference V = REFIN(+) − ...
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... INTERNAL/EXTERNAL CLOCK Internal Clock 2 Frequency Duty Cycle External Clock Frequency Duty Cycle LOGIC INPUTS Input Low Voltage INL V , Input High Voltage INH 1 AD7792B/AD7793B Unit 1.17 ± 0.01% V min/max 4 ppm/°C typ 15 ppm/°C max 85 dB typ 2.5 V nom 0.1 V min AV V max DD V min GND − ...
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... FS V min 2.1 × max 2.7/5.25 V min/max 2.7/5.25 V min/max 140 μA max 185 μA max 400 μA max 500 μA max 1 μA max − 1 Rev Page AD7792/AD7793 Test Conditions/Comments ...
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... AD7792/AD7793 TIMING CHARACTERISTICS 5.25 V, GND = 0 V, Input Logic Input Logic Table Parameter Limit MIN MAX t 100 3 t 100 4 Read Operation Write Operation ...
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... MSB SCLK ( NOTES INPUT OUTPUT Figure 3. Read Cycle Timing Diagram CS ( SCLK ( DIN (I) MSB NOTES INPUT OUTPUT Figure 4. Write Cycle Timing Diagram Rev Page AD7792/AD7793 LSB LSB ...
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... AD7792/AD7793 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter AV to GND GND DD Analog Input Voltage to GND Reference Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND AIN/Digital Input Current Operating Temperature Range Storage Temperature Range Maximum Junction Temperature TSSOP θ ...
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... AIN2(–) 9 REFIN(+)/AIN3(+) Figure 5. Pin Configuration and GND + 0.1 V. The nominal reference voltage DD − 0.1 V. This pin also functions as AIN3(−), which is the DD voltage is independent of the voltage vice versa. DD Rev Page AD7792/AD7793 . Alternatively, this pin DD ; therefore, AV can DD DD ...
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... AD7792/AD7793 Pin No. Mnemonic Description 15 DOUT/RDY Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output pin to access the output shift register of the ADC. The output shift register can contain data from any of the on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate the completion of a conversion ...
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... These numbers are typical and are generated with a differential input voltage Table 6 and Table 7 show the effective resolution, with the output peak-to-peak (p-p) resolution Table 5. Output RMS Noise (μV) vs. Gain and Output Update Rate for the AD7792 and AD7793 Using an External 2.5 V Reference Update Rate (Hz) Gain of 1 Gain ...
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... These numbers are typical and are generated with a differential input voltage Table 9 and Table 10 show the effective resolution, with the output peak-to-peak (p-p) Table 8. Output RMS Noise (μV) vs. Gain and Output Update Rate for the AD7792 and AD7793 Using the Internal Reference Update Rate (Hz) Gain of 1 Gain ...
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... TYPICAL PERFORMANCE CHARACTERISTICS 8388800 8388750 8388700 8388650 8388600 8388550 8388500 8388450 0 200 400 READING NUMBER Figure 6. Typical Noise Plot (Internal Reference, Gain = 64, Update Rate = 16.7 Hz) for AD7793 8388482 8388520 8388560 8388600 8388640 CODE Figure 7. Noise Distribution Histogram for AD7793 (Internal Reference, Gain = 64, Update Rate = 16 ...
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... CR7 denotes the first bit of the data stream. The number in parentheses indicates the power-on/reset default status of that bit. CR4 CR3 CR2 RS1(0) RS0(0) CREAD(0) Rev Page CR1 CR0 0(0) 0(0) Register Size 8-bit 8-bit 16-bit 16-bit 16-/24-bit 8-bit 8-bit 16-bit (AD7792)/24-bit (AD7793) 16-bit (AD7792)/24-bit (AD7793) ...
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... These bits must be programmed with a Logic 0 for correct operation. MR7 to MR6 CLK1 to These bits are used to select the clock source for the AD7792/AD7793. Either an on-chip 64 kHz clock can be CLK0 used external clock can be used. The ability to override using an external clock allows several AD7792/AD7793 devices to be synchronized ...
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... In idle mode, the ADC filter and modulator are held in a reset state, although the modulator clocks are still provided Power-Down Mode. In power-down mode, all the AD7792/AD7793 circuitry is powered down, including the current sources, burnout currents, bias voltage generator, and CLKOUT circuitry Internal Zero-Scale Calibration ...
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... Rev Page AD7792/AD7793 CON10 CON9 G2(1) G1(1) CON2 CON1 CH2(0) CH1(0) Bias Voltage Bias voltage generator disabled Bias voltage connected to AIN1(−) Bias voltage connected to AIN2(−) Reserved ADC Input Range (2.5 V Reference) 2.5 V 1.25 V 625 mV 312 ...
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... RDY bit/pin is set. ID REGISTER RS2, RS1, RS0 = Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793) The identification number for the AD7792/AD7793 is stored in the ID register. This is a read-only register. IO REGISTER RS2, RS1, RS0 = Power-On/Reset = 0x00 The IO register is an 8-bit register from which data can be read or to which data can be written. This register is used to enable and select the value of the excitation currents. Table 18 outlines the bit designations for the IO register. IO0 through IO7 indicate the bit locations ...
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... RS2, RS1, RS0 = Power-On/Reset = 0x5XXX (AD7792)/0x5XXX00 (AD7793) The full-scale register is a 16-bit register on the AD7792 and a 24-bit register on the AD7793. The full-scale register holds the full-scale calibration coefficient for the ADC. The AD7792/AD7793 have 3 full-scale registers, each channel having a dedicated full-scale register. The full-scale registers are read/write registers ...
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... AD7792/AD7793 ADC CIRCUIT INFORMATION OVERVIEW The AD7792/AD7793 are low power ADCs that incorporate a ∑-Δ modulator, a buffer, reference, in-amp, and an on-chip digital filter intended for the measurement of wide dynamic range, low frequency signals such as those in pressure transducers, weigh scales, and temperature measurement applications ...
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... The serial interface can be reset by writing a series the DIN input Logic 1 is written to the AD7792/AD7793 line for at least 32 serial clock cycles, the serial interface is reset. This ensures that the interface can be reset to a known state if the interface gets lost due to a software error or some glitch in the system ...
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... In single conversion mode, the AD7792/AD7793 are placed in shutdown mode between conversions. When a single conver- sion is initiated by setting MD2, MD1, MD0 the mode register, the AD7792/AD7793 power up, perform a single conversion, and then return to shutdown mode. The on-chip oscillator requires power up. A conversion requires a . DOUT/ RDY goes low to indicate the time period of 2 × ...
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... If the user has not read the conversion before the completion of the next conversion insufficient serial clocks are applied to the AD7792/AD7793 to read the word, the serial output register is reset when the next conversion is completed, and the new conversion is placed in the output serial register. ...
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... For example, when the gain is set to 64, the rms noise typically, which is equivalent to 21 bits effective resolution or 18.5 bits peak-to-peak resolution. The AD7792/AD7793 can be programmed to have a gain 16, 32, 64, and 128 using Bit G2 to Bit G0 in the configu- ration register. Therefore, with an external 2.5 V reference, the unipolar ranges are from 2.5 V while the bipolar ranges are from ± ...
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... Recommended 2.5 V reference voltage sources for the AD7792/ AD7793 include the ADR381 and ADR391, which are low noise, low power references. Also note that the reference inputs provide a high impedance, dynamic load. Because the input ...
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... AD7792/AD7793 are more immune to noise interference than a conventional high resolution converter. However, because the resolution of the AD7792/AD7793 is so high, and the noise levels from the AD7792/AD7793 are so low, care must be taken with regard to grounding and layout. The printed circuit board that houses the AD7792/AD7793 should be designed such that the analog and digital sections are separated and confined to certain areas of the board ...
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... The ground planes of the AD7792/AD7793 should be allowed to run under the AD7792/AD7793 to prevent noise coupling. The power supply lines to the AD7792/AD7793 should use as wide a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals such as clocks should be shielded with digital ground to avoid radiating noise to other sections of the board, and clock signals should never be run near the analog inputs ...
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... As the input channel is buffered, large decoupling capacitors can be placed on the front end to eliminate any noise pickup that may be present in the thermocouple leads. The AD7792/AD7793 have a reduced common-mode range with the in-amp enabled, so the bias voltage generator provides a common-mode voltage so that the ...
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... AIN1(+) and AIN1(–). Twice the voltage is developed across RL3 but, because this is a common-mode voltage, it does not introduce errors. The reference voltage for the AD7792/AD7793 is also generated using one of these matched current sources developed using a precision resistor and applied to the differential reference pins of the ADC ...
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... AD7792BRU-REEL –40°C to +105°C AD7792BRUZ 1 –40°C to +105°C 1 AD7792BRUZ-REEL –40°C to +105°C AD7793BRU –40°C to +105°C AD7793BRU-REEL –40°C to +105°C 1 AD7793BRUZ –40°C to +105°C 1 AD7793BRUZ-REEL –40°C to +105°C 1 EVAL-AD7792EBZ 1 EVAL-AD7793EBZ RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4 ...
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... NOTES Rev Page AD7792/AD7793 ...
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... AD7792/AD7793 NOTES ©2004–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04855-0-3/07(B) Rev Page ...