AD7785 Analog Devices, AD7785 Datasheet

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AD7785

Manufacturer Part Number
AD7785
Description
3-Channel, Low Noise, Low Power, 20-Bit ?-? ADC with On-Chip In-Amp and Reference
Manufacturer
Analog Devices
Datasheet

Specifications of AD7785

Resolution (bits)
20bit
# Chan
3
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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FEATURES
Up to 20 bits effective resolution
RMS noise
Current: 400 μA typical
Power-down: 1 μA maximum
Low noise programmable gain instrumentation amp
Band gap reference with 4 ppm/°C drift typical
Update rate: 4.17 Hz to 470 Hz
3 differential inputs
Internal clock oscillator
Simultaneous 50 Hz/60 Hz rejection
Programmable current sources
On-chip bias voltage generator
Burnout currents
Power supply: 2.7 V to 5.25 V
–40°C to +105°C temperature range
Independent interface power supply
16-lead TSSOP package
Interface
APPLICATIONS
Thermocouple measurements
RTD measurements
Thermistor measurements
Gas analysis
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
40 nV @ 4.17 Hz
85 nV @ 16.7 Hz
3-wire serial
SPI®, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
AIN1(+)
AIN2(+)
AIN1(–)
AIN2(–)
IOUT1
IOUT2
V
GND
BIAS
MUX
AV
3-Channel, Low Noise, Low Power, 20-Bit ∑-Δ
AV
DD
DD
FUNCTIONAL BLOCK DIAGRAM
AV
GND
DD
ADC with On-Chip In-Amp and Reference
BUF
REFERENCE
BAND GAP
INTERNAL
Figure 1.
CLOCK
IN-AMP
REFIN(+)/AIN3(+)
CLK
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Industrial process control
Instrumentation
Portable instrumentation
Blood analysis
Smart transmitters
Liquid/gas chromatography
6-digit DVM
GENERAL DESCRIPTION
The AD7785 is a low power, low noise, complete analog front
end for high precision measurement applications. The AD7785
contains a low noise 20-bit ∑-Δ ADC with three differential
analog inputs. The on-chip, low noise instrumentation amplifier
means that signals of small amplitude can be interfaced directly
to the ADC. With a gain setting of 64, the rms noise is 40 nV
when the update rate equals 4.17 Hz.
The device contains a precision low noise, low drift internal
band gap reference and can accept an external differential
reference. Other on-chip features include programmable
excitation current sources, burnout currents, and a bias voltage
generator. The bias voltage generator sets the common-mode
voltage of a channel to AV
The AD7785 can be operated with either the internal clock
or an external clock. The output data rate from the device is
software-programmable and can be varied from 4.17 Hz to 470
Hz. The device operates with a power supply from 2.7 V to
5.25 V. It consumes a current of 400 μA typical and is housed in
a 16-lead TSSOP package.
ADC
Σ-Δ
GND
REFIN(–)/AIN3(–)
AD7785
INTERFACE
CONTROL
SERIAL
LOGIC
AND
©2007 Analog Devices, Inc. All rights reserved.
DD
DOUT/RDY
DIN
SCLK
CS
DV
/2.
DD
AD7785
www.analog.com

Related parts for AD7785

AD7785 Summary of contents

Page 1

... Liquid/gas chromatography 6-digit DVM GENERAL DESCRIPTION The AD7785 is a low power, low noise, complete analog front end for high precision measurement applications. The AD7785 contains a low noise 20-bit ∑-Δ ADC with three differential analog inputs. The on-chip, low noise instrumentation amplifier means that signals of small amplitude can be interfaced directly to the ADC ...

Page 2

... AD7785 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics..................................................................... 6 Timing Diagrams.......................................................................... 7 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Output Noise and Resolution Specifications .............................. 11 External Reference...................................................................... 11 Internal Reference ...................................................................... 12 Typical Performance Characteristics ........................................... 13 On-Chip Registers .......................................................................... 14 Communications Register ...

Page 3

... Hz, FS[3:0] = 1000 90 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 100 dB typ, 50 ± 1 Hz, FS[3:0] = 1001 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000 AIN = 1 V/gain, gain ≥ ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 50 ± (FS[3:0] = 1001 ± (FS[3:0] = 1000) AD7785 ...

Page 4

... INTERNAL/EXTERNAL CLOCK Internal Clock 2 Frequency Duty Cycle External Clock Frequency Duty Cycle LOGIC INPUTS Input Low Voltage INL V , Input High Voltage INH 1 AD7785B Unit 1.17 ± 0.01% V min/max 4 ppm/°C typ 15 ppm/°C max 85 dB typ 2.5 V nom 0.1 V min AV V max DD V min GND − ...

Page 5

... FS 0.8 × min 2.1 × max 2.7/5.25 V min/max 2.7/5.25 V min/max 140 μA max 185 μA max 400 μA max 500 μA max 1 μA max Rev Page AD7785 Test Conditions/Comments ...

Page 6

... AD7785 TIMING CHARACTERISTICS 5.25 V, GND = 0 V, Input Logic Input Logic Table Parameter Limit MIN MAX t 100 3 t 100 4 Read Operation Write Operation ...

Page 7

... MSB SCLK ( NOTES INPUT OUTPUT Figure 3. Read Cycle Timing Diagram CS ( SCLK ( DIN (I) MSB NOTES INPUT OUTPUT Figure 4. Write Cycle Timing Diagram Rev Page LSB LSB AD7785 ...

Page 8

... AD7785 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter AV to GND GND DD Analog Input Voltage to GND Reference Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND AIN/Digital Input Current Operating Temperature Range Storage Temperature Range Maximum Junction Temperature TSSOP θ ...

Page 9

... AIN2(– REFIN(+)/AIN3(+) Figure 5. Pin Configuration and GND + 0.1 V. The nominal reference voltage DD − 0.1 V. This pin also functions as AIN3(−), which is the DD voltage is independent of the voltage vice versa. DD Rev Page AD7785 . Alternatively, this DD ; therefore, AV can DD DD ...

Page 10

... AD7785 Pin No. Mnemonic Description 15 DOUT/RDY Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output pin to access the output shift register of the ADC. The output shift register can contain data from any of the on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate the completion of a conversion ...

Page 11

... OUTPUT NOISE AND RESOLUTION SPECIFICATIONS EXTERNAL REFERENCE Table 5 shows the output rms noise of the AD7785 for some of the update rates and gain settings. The numbers given are for the bipolar input range with an external 2.5 V reference. These numbers are typical and are generated with a differential input voltage ...

Page 12

... AD7785 INTERNAL REFERENCE Table 7 shows the output rms noise of the AD7785 for some of the update rates and gain settings. The numbers given are for the bipolar input range with the internal 1.17 V reference. These numbers are typical and are generated with a differential input voltage ...

Page 13

... Figure 10. Bias Voltage Generator Power-Up Time vs. Load Capacitance 0.8 1.2 1.6 2.0 Rev Page –1.75 –1.05 –0.70 –0.35 0 0.35 0.70 1.05 MATCHING (%) 200 400 600 LOAD CAPACITANCE (nF) 3 UPDATE RATE = 16.6Hz T = 25°C A 2.5 2.0 1.5 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 REFERENCE VOLTAGE (V) Figure 11. RMS Noise vs. Reference Voltage (Gain = 1) AD7785 1.40 1.75 800 1000 4.0 4.5 5.0 ...

Page 14

... AD7785 ON-CHIP REGISTERS The ADC is controlled and configured via a number of on-chip registers, which are described on the following pages. In the following descriptions, set implies a Logic 1 state and cleared implies a Logic 0 state, unless otherwise stated. COMMUNICATIONS REGISTER RS2, RS1, RS0 = The communications register is an 8-bit write-only register. All communications to the part must start with a write operation to the communications register ...

Page 15

... MR7 to MR6 CLK1 to CLK0 These bits are used to select the clock source for the AD7785. Either an on-chip 64 kHz clock or an external clock can be used. The ability to override using an external clock allows several AD7785 devices to be synchronized. In addition, 50 Hz/ improved when an accurate external clock drives the AD7785. ...

Page 16

... In idle mode, the ADC filter and modulator are held in a reset state, although the modulator clocks are still provided Power-Down Mode. In power-down mode, all the AD7785 circuitry is powered down, including the current sources, burnout currents, bias voltage generator, and CLKOUT circuitry Internal Zero-Scale Calibration ...

Page 17

... Rev Page CON10 CON9 G2(1) G1(1) CON2 CON1 CH2(0) CH1(0) Bias Voltage Bias voltage generator disabled Bias voltage connected to AIN1(−) Bias voltage connected to AIN2(−) Reserved ADC Input Range (2.5 V Reference) 2.5 V 1.25 V 625 mV 312.5 mV 156.2 mV 78.125 mV 39.06 mV 19.53 mV AD7785 CON8 G0(1) CON0 CH0(0) /2. These DD ...

Page 18

... RDY bit/pin is set. This is a 24-bit register. The 20-bit conversion is contained in the 20 MSBs. The 4 LSBs are set REGISTER RS2, RS1, RS0 = Power-On/Reset = 0xXB The identification number for the AD7785 is stored in the ID register. This is a read-only register. IO REGISTER RS2, RS1, RS0 = Power-On/Reset = 0x00 The IO register is an 8-bit register from which data can be read or to which data can be written. This register is used to enable and select the value of the excitation currents. Table 16 outlines the bit designations for the IO register. IO0 through IO7 indicate the bit locations ...

Page 19

... The power- on reset value is automatically overwritten if an internal or system zero-scale calibration is initiated by the user. The offset register is a read/write register. However, the AD7785 must be in idle mode or power-down mode when writing to the offset register. IEXCDIR0 ...

Page 20

... AD7785 ADC CIRCUIT INFORMATION OVERVIEW The AD7785 is a low power ADC that incorporates a ∑-Δ modulator, a buffer, reference, in-amp, and an on-chip digital filter intended for the measurement of wide dynamic range, low frequency signals such as those in pressure transducers, weigh scales, and temperature measurement applications. ...

Page 21

... The serial interface of the AD7785 consists of four signals DIN, SCLK, and DOUT/ RDY . The DIN line is used to transfer data into the on-chip registers, and DOUT/ RDY is used for accessing from the on-chip registers ...

Page 22

... The serial interface can be reset by writing a series the DIN input Logic 1 is written to the AD7785 line for at least 32 serial clock cycles, the serial interface is reset. This ensures that the interface can be reset to a known state if the interface gets lost due to a software error or some glitch in the system ...

Page 23

... CS 0x08 DIN DOUT/RDY SCLK CS DIN DOUT/RDY SCLK 0x200A Figure 17. Single Conversion 0x58 DATA Figure 18. Continuous Conversion Rev Page 0x58 DATA 0x58 AD7785 DATA ...

Page 24

... If the user has not read the conversion before the completion of the next conversion insufficient serial clocks are applied to the AD7785 to read the word, the serial output register is reset when the next conversion is completed, and the new conversion is placed in the output serial register. ...

Page 25

... For example, when the gain is set to 64, the rms noise typically, which is equivalent to 20 bits effective resolution or 18.5 bits peak-to-peak resolution. The AD7785 can be programmed to have a gain 16, 32, 64, and 128 using Bit G2 to Bit G0 in the configuration register. Therefore, with an external 2.5 V reference, the unipolar ranges are from 2.5 V while the bipolar ranges are from ± ...

Page 26

... The power-up time of the bias voltage generator is dependent on the load capacitance. To accommodate higher load capacitances, the AD7785 has a boost bit. When this bit is set to 1, the current consumed by the bias voltage generator increases, so that the power-up time is considerably reduced. ...

Page 27

... RDY bit in the status register is set, the DOUT/ RDY pin goes low ( low), and the AD7785 reverts to idle mode. During an internal zero-scale or full-scale calibration, the respective zero input and full-scale input are automatically connected internally to the ADC input pins ...

Page 28

... The ground planes of the AD7785 should be allowed to run under the device to prevent noise coupling. The power supply lines to the AD7785 should use as wide a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals such as clocks ...

Page 29

... The cold junction measurement uses a ratiometric configuration, so the reference is provided externally. Because the signal from the thermocouple is small, the AD7785 is operated with the in-amp enabled to amplify the signal from the thermocouple. As the input channel is buffered, large ...

Page 30

... RL3. However, because this is a common- mode voltage, it does not introduce errors. The reference voltage for the AD7785 is also generated using one of these matched current sources developed using a precision resistor and applied to the differential reference pins of the ADC ...

Page 31

... Z = RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8° 0.30 0.65 0° 0.19 SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 22. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters Package Description 16-Lead TSSOP 16-Lead TSSOP Evaluation Board Rev Page AD7785 0.75 0.60 0.45 Package Option RU-16 RU-16 ...

Page 32

... AD7785 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06721-0-4/07(0) Rev Page ...

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