AD7606-6 Analog Devices, AD7606-6 Datasheet - Page 13

• Manufacturer Part Number: AD7606-6
• Description: 6-Channel DAS with 16-Bit, Bipolar, Simultaneous Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7606-6

• Resolution (bits): 16bit
• # Chan: 6
• Sample Rate: 200kSPS
• Interface: Ser,SPI,Par
• Analog Input Type: Diff-Uni
• Ain Range: Bip 10V,Bip 5.0V
• Adc Architecture: SAR
• Pkg Type: QFP

Data Sheet
Table 6. Pin Function Descriptions
Pin No.
1, 37, 38,
48
2, 26, 35,
40, 41, 47
5, 4, 3
6
7
Type
P
P
DI
DI
DI
1
ANALOG INPUT
DECOUPLING CAP PIN
POWER SUPPLY
GROUND PIN
DATA OUTPUT
DIGITAL OUTPUT
DIGITAL INPUT
REFERENCE INPUT/OUTPUT
AV
AGND
OS [2:0]
PAR/SER/
BYTE SEL
STBY
AD7606
CC
Mnemonic
AV
AGND
OS [2:0]
PAR/SER/
BYTE SEL
STBY
AD7606-6
PAR/SER/BYTE SEL
CC
FRSTDATA
CONVST A
CONVST B
RD/SCLK
RANGE
RESET
AGND
BUSY
STBY
AV
OS 0
OS 1
OS 2
DB0
AV
AGND
OS [2:0]
PAR/SER/
BYTE SEL
STBY
AD7606-4
CS
Figure 10. AD7606-4 Pin Configuration
CC 1
CC
10
12
13
14
15
16
11
2
3
4
5
6
7
8
9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Rev. C | Page 13 of 36
PIN 1
Description
Analog Supply Voltage, 4.75 V to 5.25 V. This supply voltage is applied to
the internal front-end amplifiers and to the ADC core. These supply pins
should be decoupled to AGND.
Analog Ground. These pins are the ground reference points for all analog
circuitry on the AD7606. All analog input signals and external reference
signals should be referred to these pins. All six of these AGND pins should
connect to the AGND plane of a system.
Oversampling Mode Pins. Logic inputs. These inputs are used to select the
oversampling ratio. OS 2 is the MSB control bit, and OS 0 is the LSB control
bit. See the Digital Filter section for more details about the oversampling
mode of operation and Table 9 for oversampling bit decoding.
Parallel/Serial/Byte Interface Selection Input. Logic input. If this pin is tied to
a logic low, the parallel interface is selected. If this pin is tied to a logic high,
the serial interface is selected. Parallel byte interface mode is selected when
this pin is logic high and DB15/BYTE SEL is logic high (see Table 8).
In serial mode, the RD/SCLK pin functions as the serial clock input. The
DB7/D
the serial interface is selected, the DB[15:9] and DB[6:0] pins should be tied to
ground.
In byte mode, DB15, in conjunction with PAR/SER/BYTE SEL, is used to select
the parallel byte mode of operation (see Table 8). DB14 is used as the HBEN
pin. DB[7:0] transfer the 16-bit conversion results in two RD operations,
with DB0 as the LSB of the data transfers.
Standby Mode Input. This pin is used to place the AD7606/AD7606-6/
AD7606-4 into one of two power-down modes: standby mode or shutdown
mode. The power-down mode entered depends on the state of the RANGE
pin, as shown in Table 7. When in standby mode, all circuitry, except the on-
chip reference, regulators, and regulator buffers, is powered down. When
in shutdown mode, all circuitry is powered down.
OUT
A pin and the DB8/D
(Not to Scale)
AD7606-4
TOP VIEW
AD7606/AD7606-6/AD7606-4
OUT
B pin function as serial data outputs. When
46
40
48
47
45
44
43
42
41
39
38
37
36
35
34
33
AV
AGND
REFGND
REFCAPB
REFCAPA
REFGND
REFIN/REFOUT
AGND
AGND
REGCAP
AV
AV
REGCAP
AGND
REF SELECT
DB15/BYTE SEL
CC
CC
CC