AD633JNZ Analog Devices Inc, AD633JNZ Datasheet - Page 6

• Manufacturer Part Number: AD633JNZ
• Description: IC ANALOG MULTIPLIER 8-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD633JNZ

• Function: Analog Multiplier
• Number Of Bits/stages: 4-Quadrant
• Package / Case: 8-DIP (0.300", 7.62mm)
• No. Of Multipliers / Dividers: 1
• No. Of Amplifiers: 3
• Supply Voltage Range: ± 8V To ± 18V
• Slew Rate: 20V/µs
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: DIP
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD633
the basis of voltage controlled integrators and oscillators as will
be shown later in this Applications section. The transfer func-
tion of this circuit has the form
Linear Amplitude Modulator
The AD633 can be used as a linear amplitude modulator with
no external components. Figure 10 shows the circuit. The car-
rier and modulation inputs to the AD633 are multiplied to
produce a double-sideband signal. The carrier signal is fed
forward to the AD633’s Z input where it is summed with the
double-sideband signal to produce a double-sideband with car-
rier output.
Voltage Controlled Low-Pass and High-Pass Filters
Figure 11 shows a single multiplier used to build a voltage con-
trolled low-pass filter. The voltage at output A is a result of
filtering, E
trol input. The break frequency, f
and the rolloff is 6 dB per octave. This output, which is at a
high impedance point, may need to be buffered.
The voltage at output B, the direct output of the AD633, has
same response up to frequency f
filter,
then levels off to a constant attenuation of f
For example, if R = 8 kΩ and C = 0.002 µF, then output A has
a pole at frequencies from 100 Hz to 10 kHz for E
from 100 mV to 10 V. Output B has an additional zero at 10 kHz
(and can be loaded because it is the multiplier’s low impedance
output). The circuit can be changed to a high-pass filter Z inter-
changing the resistor and capacitor as shown in Figure 12.
MODULATION
CARRIER
I
E
f
O
f
2
C
1
INPUT
INPUT
sin
=
=
=
E
(
M
Figure 10. Linear Amplitude Modulator
S
2
R
t
1
20
. The break frequency is modulated by E
π
(
1
V
RC
X
E
)
1
C
π
−
RC
X
10
1
2
3
4
2
X1
X2
Y1
Y2
)
V
AD633JN
(
Y
1
−
Y
+V
–V
W
2
S
Z
S
)
1
, the natural breakpoint of RC
2
8
7
6
5
, equals
–15V
+15V
0.1 F
0.1 F
1
W = 1+
/f
2
= E
10V
C
E
M
/10.
C
C
, the con-
ranging
E
C
sin
(7)
(8)
(9)
t
–6–
Voltage Controlled Quadrature Oscillator
Figure 13 shows two multipliers being used to form integrators
with controllable time constants in second order differential
equation feedback loop. R2 and R5 provide controlled current
output operation. The currents are integrated in capacitors C1
and C2, and the resulting voltages at high impedance are applied to
the X inputs of the “next” AD633. The frequency control input,
E
calibration of 100 Hz/V. The accuracy is limited by the Y input
offsets. The practical tuning range of this circuit is 100:1. C2
(proportional to C1 and C3), R3, and R4 provide regenerative
feedback to start and maintain oscillation. The diode bridge, D1
through D4 (1N914s), and Zener diode D5 provide economical
temperature stabilization and amplitude stabilization at ± 8.5 V
by degenerative damping. The out-put from the second
integrator (10 V sin ωt) has the lowest distortion.
AGC AMPLIFIERS
Figure 14 shows an AGC circuit that uses an rms-to-dc con-
verter to measure the amplitude of the output waveform. The
AD633 and A1, 1/2 of an AD712 dual op amp, form a voltage
controlled amplifier. The rms-to-dc converter, an AD736, mea-
sures the rms value of the output signal. Its output drives A2,
an integrator/comparator whose output controls the gain of the
voltage controlled amplifier. The 1N4148 diode prevents the
output of A2 from going negative. R8, a 50 kΩ variable resistor,
sets the circuit’s output level. Feedback around the loop forces
the voltages at the inverting and noninverting inputs of A2 to be
equal, thus the AGC.
C
, connected to the Y inputs, varies the integrator gains with a
CONTROL
INPUT E
INPUT E
SIGNAL
CONTROL
INPUT E
INPUT E
Figure 12. Voltage Controlled High-Pass Filter
Figure 11. Voltage Controlled Low-Pass Filter
SIGNAL
C
S
C
S
1
2
3
4
X1
X2
Y1
Y2
1
2
3
4
AD633JN
X1
X2
Y1
Y2
AD633JN
+V
–V
W
Z
S
S
+V
–V
W
8
7
6
5
Z
S
S
–15V
+15V
8
7
6
5
–15V
0.1 F
+15V
0.1 F
0.1 F
0.1 F
–6dB/OCTAVE
0
dB
R
C
OUTPUTA
OUTPUT B =
OUTPUT A =
f1
0
OUTPUTA
dB
f2
R
C
T
T
+6dB/OCTAVE
f2 f1
OUTPUT B
OUTPUT A
2
OUTPUTB
1
=
=
W
W
1
1
2
1
1 + T
1 + T
1 + T
f
OUTPUTB
= RC
=
1
E
C
1
2
2
10
R
REV. E
P
P
P
f
C